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Groups > linux.kernel > #1223021
| From | Lee Jones <lee.jones@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 07/11] ARM: DT: STiH407: Add systrace pin configuration |
| Date | 2015-09-11 20:10 +0200 |
| Message-ID | <q7AVR-Tz-45@gated-at.bofh.it> (permalink) |
| References | <q7zZL-7Wu-3@gated-at.bofh.it> <q7zZM-7Wu-25@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Fri, 11 Sep 2015, Peter Griffin wrote:
> This patch adds the pin config for systrace for
> STiH407 family silicon.
>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
> arch/arm/boot/dts/stih407-pinctrl.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
Besides the SoBs, which are a little confusing:
Acked-by: Lee Jones <lee.jones@linaro.org>
> diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
> index cde776b..798d901 100644
> --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
> @@ -658,6 +658,18 @@
> };
> };
> };
> +
> + systrace {
> + pinctrl_systrace_default: systrace-default {
> + st,pins {
> + trc_data0 = <&pio11 3 ALT5 OUT>;
> + trc_data1 = <&pio11 4 ALT5 OUT>;
> + trc_data2 = <&pio11 5 ALT5 OUT>;
> + trc_data3 = <&pio11 6 ALT5 OUT>;
> + trc_clk = <&pio11 7 ALT5 OUT>;
> + };
> + };
> + };
> };
>
> pin-controller-front1 {
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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[PATCH 00/11] ARM: STi: STiH407: Pinctrl updates Peter Griffin <peter.griffin@linaro.org> - 2015-09-11 19:10 +0200
[PATCH 07/11] ARM: DT: STiH407: Add systrace pin configuration Peter Griffin <peter.griffin@linaro.org> - 2015-09-11 19:10 +0200
Re: [PATCH 07/11] ARM: DT: STiH407: Add systrace pin configuration Lee Jones <lee.jones@linaro.org> - 2015-09-11 20:10 +0200
[PATCH 06/11] ARM: DT: STiH407: Add NAND flash controller pin configuration Peter Griffin <peter.griffin@linaro.org> - 2015-09-11 19:10 +0200
[PATCH 01/11] ARM: STi: DT: STiH407: Add a cec0 pin definition Peter Griffin <peter.griffin@linaro.org> - 2015-09-11 19:10 +0200
Re: [PATCH 01/11] ARM: STi: DT: STiH407: Add a cec0 pin definition Lee Jones <lee.jones@linaro.org> - 2015-09-11 20:10 +0200
[PATCH 09/11] ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX Peter Griffin <peter.griffin@linaro.org> - 2015-09-11 19:10 +0200
Re: [PATCH 09/11] ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX Lee Jones <lee.jones@linaro.org> - 2015-09-11 20:00 +0200
[PATCH 03/11] ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs Peter Griffin <peter.griffin@linaro.org> - 2015-09-11 19:20 +0200
Re: [PATCH 00/11] ARM: STi: STiH407: Pinctrl updates Patrice Chotard <patrice.chotard@st.com> - 2015-09-14 14:40 +0200
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