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Re: [RFC 3/5] powerpc: atomic: implement atomic{,64}_{add,sub}_return_* variants

From Pranith Kumar <bobby.prani@gmail.com>
Newsgroups linux.kernel
Subject Re: [RFC 3/5] powerpc: atomic: implement atomic{,64}_{add,sub}_return_* variants
Date 2015-09-02 17:30 +0200
Message-ID <q4i95-yB-35@gated-at.bofh.it> (permalink)
References (4 earlier) <q2sFA-5FU-21@gated-at.bofh.it> <q2tV0-7of-7@gated-at.bofh.it> <q3Z6p-72W-5@gated-at.bofh.it> <q41Bg-21v-21@gated-at.bofh.it> <q4cZI-1tV-27@gated-at.bofh.it>
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Hi Will,

On 09/02/2015 05:59 AM, Will Deacon wrote:
> I just thought it was worth making this point, because it is prohibited
> in SC and I don't want people to think that our RELEASE/ACQUIRE operations
> are SC (even though they happen to be on arm64).

This is interesting information. Does that mean that the following patch
should work? (I am not proposing to use it, just trying to understand if 
REL+ACQ will act as a full barrier on ARM64, which you say it does).

Thanks,
Pranith.

diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
index d8c25b7..14a1b35 100644
--- a/arch/arm64/include/asm/cmpxchg.h
+++ b/arch/arm64/include/asm/cmpxchg.h
@@ -68,8 +68,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
                BUILD_BUG();
        }
 
-       smp_mb();
-       return ret;
+       return smp_load_acquire(ret);
 }
 
 #define xchg(ptr,x) \

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Thread

[RFC 0/5] atomics: powerpc: implement relaxed/acquire/release variants of some atomics Boqun Feng <boqun.feng@gmail.com> - 2015-08-28 04:50 +0200
  [RFC 4/5] powerpc: atomic: implement xchg_* and atomic{,64}_xchg_* variants Boqun Feng <boqun.feng@gmail.com> - 2015-08-28 04:50 +0200
  [RFC 3/5] powerpc: atomic: implement atomic{,64}_{add,sub}_return_* variants Boqun Feng <boqun.feng@gmail.com> - 2015-08-28 04:50 +0200
    Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Peter Zijlstra <peterz@infradead.org> - 2015-08-28 12:50 +0200
      Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Boqun Feng <boqun.feng@gmail.com> - 2015-08-28 14:10 +0200
        Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Boqun Feng <boqun.feng@gmail.com> - 2015-08-28 16:20 +0200
          Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Peter Zijlstra <peterz@infradead.org> - 2015-08-28 17:40 +0200
            Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Boqun Feng <boqun.feng@gmail.com> - 2015-08-28 19:00 +0200
            Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Will Deacon <will.deacon@arm.com> - 2015-09-01 21:10 +0200
              Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2015-09-01 23:50 +0200
                Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Will Deacon <will.deacon@arm.com> - 2015-09-02 12:00 +0200
                Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2015-09-02 13:00 +0200
                Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Pranith Kumar <bobby.prani@gmail.com> - 2015-09-02 17:30 +0200
                Re: [RFC 3/5] powerpc: atomic: implement atomic{,64}_{add,sub}_return_*  variants Pranith Kumar <bobby.prani@gmail.com> - 2015-09-02 17:40 +0200
                Re: [RFC 3/5] powerpc: atomic: implement  atomic{,64}_{add,sub}_return_* variants Will Deacon <will.deacon@arm.com> - 2015-09-03 12:40 +0200
  [RFC 5/5] powerpc: atomic: implement cmpxchg{,64}_* and atomic{,64}_cmpxchg_* variants Boqun Feng <boqun.feng@gmail.com> - 2015-08-28 04:50 +0200
  [RFC 1/5] atomics: add test for atomic operations with _relaxed variants Boqun Feng <boqun.feng@gmail.com> - 2015-08-28 04:50 +0200

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