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Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi

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On Wed, 26 Aug 2015, Qais Yousef wrote:
> On 08/26/2015 02:19 PM, Thomas Gleixner wrote:
> > Wrong. You cannot move an IPI around with set_affinity. It's possible
> > to send an IPI to more than one target CPU, but that has nothing to do
> > with affinities.
> > 
> > Are you talking about IPIs or about general interrupts which have an
> > affinity setting?
> 
> Maybe my view of the world is limited. I wrote this because the mechanism to
> route an IPI and set affinities is the same.

That might be the case on your particular platform, but that's not
generally true.

> So specifying which core or hardware thread should Linux CPU route this IPI to
> is the same as setting the affinity, no? Linux will not move the IPI that is
> routed to the coprocessor core. Just the IPI it will receive.
> 
> Also the way I see it is that this is an external interrupt whether it was
> asserted by real signal or through IPI mechanism and it should be treated as
> such in terms of moving inside Linux SMP, no? Again maybe my view of the world
> is limited but I can't see why migrating the interrupt would affect
> correctness unless there's a hardware limitation like only core 0 can read
> info from AXD (which is where my suggestion to using affinity hint above to
> accommodate such limitations).
> 
> When you say 'It is possible to send an IPI to more than one target CPU', is
> it a case we need to cater for? The way I was seeing this problem is
> communication between single Linux SMP and a single coprocessor unit. I didn't
> think of it as single to many. Even if the coprocessor is a cluster I'd expect
> it to act as a single unit like Linux SMP. And if it wanted to send 2
> different interrupts it will need to use 2 different IPIs.

You are confusing the terms.

IPI = Inter Processor Interrupt

As the name says that's an interrupt which goes from one cpu to
another. So an IPI has a very clear target.

Whether the platform implements IPIs via general interrupts which are
made affine to a particular cpu or some other specialized mechanism is
completely irrelevant. An IPI is not subject to affinity settings,
period.

So if you want to use an IPI then you need a target cpu for that IPI.

If you want something which can be affined to any cpu, then you need a
general interrupt and not an IPI.

That's what I asked before and you still did not answer that question.

> > Are you talking about IPIs or about general interrupts which have an
> > affinity setting?

Thanks,

	tglx
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[PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-24 14:40 +0200
  Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Thomas Gleixner <tglx@linutronix.de> - 2015-08-24 14:50 +0200
    Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-24 15:10 +0200
      Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Marc Zyngier <marc.zyngier@arm.com> - 2015-08-24 15:40 +0200
        Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-24 16:30 +0200
          Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Thomas Gleixner <tglx@linutronix.de> - 2015-08-24 17:10 +0200
            Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-24 18:40 +0200
              Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Marc Zyngier <marc.zyngier@arm.com> - 2015-08-24 19:20 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-26 13:30 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Thomas Gleixner <tglx@linutronix.de> - 2015-08-26 15:30 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-26 17:00 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Thomas Gleixner <tglx@linutronix.de> - 2015-08-26 17:10 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-26 17:50 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Thomas Gleixner <tglx@linutronix.de> - 2015-08-26 23:50 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Jiang Liu <jiang.liu@linux.intel.com> - 2015-08-27 04:30 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-28 12:40 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Thomas Gleixner <tglx@linutronix.de> - 2015-08-28 16:30 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-28 17:20 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-09-02 11:40 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Marc Zyngier <marc.zyngier@arm.com> - 2015-09-02 12:00 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-09-02 12:50 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Marc Zyngier <marc.zyngier@arm.com> - 2015-09-02 14:00 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-09-02 15:30 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Marc Zyngier <marc.zyngier@arm.com> - 2015-09-02 16:20 +0200
                Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Jason Cooper <jason@lakedaemon.net> - 2015-09-02 14:20 +0200
      Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Thomas Gleixner <tglx@linutronix.de> - 2015-08-24 17:00 +0200
        Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi Qais Yousef <qais.yousef@imgtec.com> - 2015-08-24 17:20 +0200

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