Re: [PATCH v3 5/6] arch: introduce memremap_cache() and memremap_wt()

From	Dan Williams <dan.j.williams@intel.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH v3 5/6] arch: introduce memremap_cache() and memremap_wt()
Date	2015-06-08 21:40 +0200
Message-ID	<pzb3Q-8tx-11@gated-at.bofh.it> (permalink)
References	<pxoye-57s-9@gated-at.bofh.it> <pxoyf-57s-29@gated-at.bofh.it> <pz85Y-46w-7@gated-at.bofh.it> <pz9Y6-6UC-1@gated-at.bofh.it> <pzaAN-7UC-11@gated-at.bofh.it>
Organization	linux.* mail to news gateway

Show all headers | View raw

On Mon, Jun 8, 2015 at 12:04 PM, Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
> On Mon, Jun 8, 2015 at 9:25 PM, Dan Williams <dan.j.williams@intel.com> wrote:
>
>>>> +       if (region_is_ram(offset, size) != 0) {
>>>> +               WARN_ONCE(1, "memremap attempted on ram %pa size: %zd\n",
>>>
>>> %zu
>>
>> Sure, thanks for taking a look Andy!
>
> One more thing, can we do
> WARN_ONCE(region_is_ram(offset, size), …); ?
>

We still want to return false in this case so it would become
"if(WARN_ONCE(...)) return false;".  Neil once made the argument to me
that we should be able to compile all of the asserts out of the
kernel, also "if (WARN_ONCE(...))" is a bit harder to read as you need
to go check the macro to make sure it returns the right status, and
more than once.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Back to linux.kernel | Previous | Next — Previous in thread | Find similar | Unroll thread

Thread

Re: [PATCH v3 5/6] arch: introduce memremap_cache() and memremap_wt() Dan Williams <dan.j.williams@intel.com> - 2015-06-08 20:30 +0200
  Re: [PATCH v3 5/6] arch: introduce memremap_cache() and memremap_wt() Andy Shevchenko <andy.shevchenko@gmail.com> - 2015-06-08 21:10 +0200
    Re: [PATCH v3 5/6] arch: introduce memremap_cache() and memremap_wt() Dan Williams <dan.j.williams@intel.com> - 2015-06-08 21:40 +0200

csiph-web