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Re: [PATCH v2 6/7] dax: update I/O path to do proper PMEM flushing

From Ross Zwisler <ross.zwisler@linux.intel.com>
Newsgroups linux.kernel
Subject Re: [PATCH v2 6/7] dax: update I/O path to do proper PMEM flushing
Date 2015-08-14 18:50 +0200
Message-ID <pXql3-7I3-3@gated-at.bofh.it> (permalink)
References <pX41c-Hx-11@gated-at.bofh.it> <pX41d-Hx-43@gated-at.bofh.it> <pX84O-6PO-19@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Thu, 2015-08-13 at 14:11 -0700, Dan Williams wrote:
> On Thu, Aug 13, 2015 at 9:51 AM, Ross Zwisler
> <ross.zwisler@linux.intel.com> wrote:
> > Update the DAX I/O path so that all operations that store data (I/O
> > writes, zeroing blocks, punching holes, etc.) properly synchronize the
> > stores to media using the PMEM API.  This ensures that the data DAX is
> > writing is durable on media before the operation completes.
> >
> > Signed-off-by: Ross Zwisler <ross.zwisler@linux.intel.com>
> [..]
> > @@ -145,18 +147,27 @@ static ssize_t dax_io(struct inode *inode, struct iov_iter *iter,
> >                                 retval = dax_get_addr(bh, &addr, blkbits);
> >                                 if (retval < 0)
> >                                         break;
> > -                               if (buffer_unwritten(bh) || buffer_new(bh))
> > +                               if (buffer_unwritten(bh) || buffer_new(bh)) {
> >                                         dax_new_buf(addr, retval, first, pos,
> >                                                                         end);
> > +                                       need_wmb = true;
> > +                               }
> >                                 addr += first;
> >                                 size = retval - first;
> >                         }
> >                         max = min(pos + size, end);
> >                 }
> >
> > -               if (iov_iter_rw(iter) == WRITE)
> > +               if (iov_iter_rw(iter) == WRITE) {
> >                         len = copy_from_iter_nocache(addr, max - pos, iter);
> > -               else if (!hole)
> > +                       /*
> > +                        * copy_from_iter_nocache() uses non-temporal stores
> > +                        * for iovec iterators so we can skip the write back.
> > +                        */
> > +                       if (!iter_is_iovec(iter))
> > +                               wb_cache_pmem((void __pmem *)addr, max - pos);
> > +                       need_wmb = true;
> 
> I think this should become copy_from_iter_pmem() and hide the
> wb_cache_pmem() as an internal arch detail.  I.e. wb_cache_pmem()
> should not be a global api when its usage is architecture specific.
> Otherwise are you asserting that all architecture implementations of
> copy_from_iter_nocache() are pmem safe?

Great point.  Nope, copy_from_iter_nocache() uses __copy_from_user_nocache(),
which just defaults to __copy_from_user() on non-x86.  Dang, the PMEM API just
keeps growing...  :(


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Thread

[PATCH v2 6/7] dax: update I/O path to do proper PMEM flushing Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-13 19:00 +0200
  Re: [PATCH v2 6/7] dax: update I/O path to do proper PMEM flushing Dan Williams <dan.j.williams@intel.com> - 2015-08-13 23:20 +0200
    Re: [PATCH v2 6/7] dax: update I/O path to do proper PMEM flushing Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-14 18:50 +0200

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