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[PATCH v2 1/5] clk: rockchip: rk3288: Add the clock id of eFuse

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From: ZhengShunQian <zhengsq@rock-chips.com>

The clock id is necessary item, changing it from 0
then can be referred in driver and device tree.

Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 drivers/clk/rockchip/clk-rk3288.c      | 2 +-
 include/dt-bindings/clock/rk3288-cru.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 0df5bae..31c4f78 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -647,7 +647,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
 	GATE(0, "pclk_efuse_1024", "pclk_cpu", 0, RK3288_CLKGATE_CON(11), 2, GFLAGS),
 	GATE(PCLK_TZPC, "pclk_tzpc", "pclk_cpu", 0, RK3288_CLKGATE_CON(11), 3, GFLAGS),
 	GATE(PCLK_UART2, "pclk_uart2", "pclk_cpu", 0, RK3288_CLKGATE_CON(11), 9, GFLAGS),
-	GATE(0, "pclk_efuse_256", "pclk_cpu", 0, RK3288_CLKGATE_CON(11), 10, GFLAGS),
+	GATE(PCLK_EFUSE256, "pclk_efuse_256", "pclk_cpu", 0, RK3288_CLKGATE_CON(11), 10, GFLAGS),
 	GATE(PCLK_RKPWM, "pclk_rkpwm", "pclk_cpu", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(11), 11, GFLAGS),
 
 	/* ddrctrl [DDR Controller PHY clock] gates */
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index c719aac..ab74d5e 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -164,6 +164,7 @@
 #define PCLK_DDRUPCTL1		366
 #define PCLK_PUBL1		367
 #define PCLK_WDT		368
+#define PCLK_EFUSE256		369
 
 /* hclk gates */
 #define HCLK_GPS		448
-- 
1.9.1

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Thread

[PATCH v2 0/5] Add eFuse driver of Rockchip SoC Shunqian Zheng <zhengsq@rock-chips.com> - 2015-08-11 12:20 +0200
  [PATCH v2 3/5] nvmem: rockchip-efuse: implement efuse driver Shunqian Zheng <zhengsq@rock-chips.com> - 2015-08-11 12:20 +0200
  [PATCH v2 4/5] Documentation: rockchip-efuse: describe the usage of eFuse Shunqian Zheng <zhengsq@rock-chips.com> - 2015-08-11 12:20 +0200
  [PATCH v2 1/5] clk: rockchip: rk3288: Add the clock id of eFuse Shunqian Zheng <zhengsq@rock-chips.com> - 2015-08-11 12:20 +0200
    Re: [PATCH v2 1/5] clk: rockchip: rk3288: Add the clock id of eFuse Stephen Boyd <sboyd@codeaurora.org> - 2015-08-12 03:40 +0200
  [PATCH v2 5/5] ARM: dts: rockchip: add eFuse config of rk3288 SoC Shunqian Zheng <zhengsq@rock-chips.com> - 2015-08-11 12:30 +0200
  [PATCH v2 2/5] nvmem: fix the out-of-range leak in read/write() Shunqian Zheng <zhengsq@rock-chips.com> - 2015-08-11 12:30 +0200

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