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[tip:locking/core] locking/lockref: Remove homebrew cmpxchg64_relaxed() macro definition

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Commit-ID:  f5468ffde13fc991bd4d6bdec507ffd5777865bd
Gitweb:     http://git.kernel.org/tip/f5468ffde13fc991bd4d6bdec507ffd5777865bd
Author:     Will Deacon <will.deacon@arm.com>
AuthorDate: Thu, 6 Aug 2015 17:54:40 +0100
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 12 Aug 2015 11:59:04 +0200

locking/lockref: Remove homebrew cmpxchg64_relaxed() macro definition

cmpxchg64_relaxed() is now defined by linux/atomic.h, so we can
remove our local definition from the lockref code.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Waiman.Long@hp.com
Cc: paulmck@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/1438880084-18856-5-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 lib/lockref.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/lib/lockref.c b/lib/lockref.c
index 494994b..5a92189 100644
--- a/lib/lockref.c
+++ b/lib/lockref.c
@@ -4,14 +4,6 @@
 #if USE_CMPXCHG_LOCKREF
 
 /*
- * Allow weakly-ordered memory architectures to provide barrier-less
- * cmpxchg semantics for lockref updates.
- */
-#ifndef cmpxchg64_relaxed
-# define cmpxchg64_relaxed cmpxchg64
-#endif
-
-/*
  * Note that the "cmpxchg()" reloads the "old" value for the
  * failure case.
  */
--
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[PATCH v5 4/8] lockref: remove homebrew cmpxchg64_relaxed macro definition Will Deacon <will.deacon@arm.com> - 2015-08-06 19:00 +0200
  [tip:locking/core] locking/lockref:   Remove homebrew cmpxchg64_relaxed() macro definition tip-bot for Will Deacon <tipbot@zytor.com> - 2015-08-12 14:40 +0200

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