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Re: [PATCH 1/4] ARC: add barriers to futex code

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> The atomic ops on futex need to provide the full barrier just like
> regular atomics in kernel.
> 
> Also remove pagefault_enable/disable in futex_atomic_cmpxchg_inatomic()
> as core code already does that
> 
> Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
> Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Michel Lespinasse <walken@google.com>
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> ---
>  arch/arc/include/asm/futex.h | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arc/include/asm/futex.h b/arch/arc/include/asm/futex.h
> index 70cfe16b742d..160656d0a15a 100644
> --- a/arch/arc/include/asm/futex.h
> +++ b/arch/arc/include/asm/futex.h
> @@ -20,6 +20,7 @@
> 
>  #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\
>  							\
> +	smp_mb();					\
>  	__asm__ __volatile__(				\
>  	"1:	llock	%1, [%2]		\n"	\
>  		insn				"\n"	\
> @@ -40,12 +41,14 @@
>  							\
>  	: "=&r" (ret), "=&r" (oldval)			\
>  	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT)	\
> -	: "cc", "memory")
> +	: "cc", "memory");				\
> +	smp_mb();					\

I think you should drop the ;

> 
>  #else	/* !CONFIG_ARC_HAS_LLSC */
> 
>  #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\
>  							\
> +	smp_mb();					\
>  	__asm__ __volatile__(				\
>  	"1:	ld	%1, [%2]		\n"	\
>  		insn				"\n"	\
> @@ -65,7 +68,8 @@
>  							\
>  	: "=&r" (ret), "=&r" (oldval)			\
>  	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT)	\
> -	: "cc", "memory")
> +	: "cc", "memory");				\
> +	smp_mb();					\

dito

> 
>  #endif
> 
> @@ -151,7 +155,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval,
>  	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
>  		return -EFAULT;
> 
> -	pagefault_disable();
> +	smp_mb();
> 
>  	__asm__ __volatile__(
>  #ifdef CONFIG_ARC_HAS_LLSC
> @@ -178,7 +182,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval,
>  	: "r"(oldval), "r"(newval), "r"(uaddr), "ir"(-EFAULT)
>  	: "cc", "memory");
> 
> -	pagefault_enable();
> +	smp_mb();
> 
>  	*uval = val;
>  	return val;

Looks like pagefault_() magic is only required for futex_atomic_op_inuser. So
this should be fine (and arc seems to be the only arch left that has in in
_inatomic).

Not sure if you want to change the comment:

/* Compare-xchg with pagefaults disabled.
 *  Notes:
 *      -Best-Effort: Exchg happens only if compare succeeds.

Maybe something like "Compare-xchg: pagefaults have to be disabled by the
caller"

Looks sane to me.

David

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[PATCH 1/4] ARC: add barriers to futex code Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-08-06 14:40 +0200
  Re: [PATCH 1/4] ARC: add barriers to futex code David Hildenbrand <dahi@linux.vnet.ibm.com> - 2015-08-06 15:20 +0200
    Re: [PATCH 1/4] ARC: add barriers to futex code Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-08-06 15:30 +0200
  Re: [PATCH 1/4] ARC: add barriers to futex code Peter Zijlstra <peterz@infradead.org> - 2015-08-06 15:50 +0200
    Re: [PATCH 1/4] ARC: add barriers to futex code Will Deacon <will.deacon@arm.com> - 2015-08-06 16:20 +0200
    Re: [PATCH 1/4] ARC: add barriers to futex code Peter Zijlstra <peterz@infradead.org> - 2015-08-07 13:50 +0200

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