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Re: [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform

From Andy Gross <agross@codeaurora.org>
Newsgroups linux.kernel
Subject Re: [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform
Date 2015-08-03 21:40 +0200
Message-ID <pTtKy-4bA-9@gated-at.bofh.it> (permalink)
References <oJgnL-5ru-5@gated-at.bofh.it> <pTgaB-1gF-3@gated-at.bofh.it> <pTgaC-1gF-13@gated-at.bofh.it>
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On Mon, Aug 03, 2015 at 10:38:18AM +0530, Archit Taneja wrote:
> Enable the NAND controller node on the AP148 platform. Provide pinmux
> information.
> 
> Cc: devicetree@vger.kernel.org
> 
> Signed-off-by: Archit Taneja <architt@codeaurora.org>
> ---
>  arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36 ++++++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
> index 7f9ea50..2e88eff 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
> +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
> @@ -30,6 +30,28 @@
>  					bias-none;
>  				};
>  			};
> +			nand_pins: nand_pins {
> +				mux {
> +					pins = "gpio34", "gpio35", "gpio36",
> +					       "gpio37", "gpio38", "gpio39",
> +					       "gpio40", "gpio41", "gpio42",
> +					       "gpio43", "gpio44", "gpio45",
> +					       "gpio46", "gpio47";
> +					function = "nand";
> +					drive-strength = <10>;
> +					bias-disable;
> +				};
> +				pullups {
> +					pins = "gpio39";
> +					bias-pull-up;
> +				};
> +				hold {
> +					pins = "gpio40", "gpio41", "gpio42",
> +					       "gpio43", "gpio44", "gpio45",
> +					       "gpio46", "gpio47";
> +					bias-bus-hold;

Maybe split out the bias-disable into a separate set and remove that property
from the mux.

> +				};
> +			};
>  		};
>  
>  		gsbi@16300000 {
> @@ -93,5 +115,19 @@
>  		sata@29000000 {
>  			status = "ok";
>  		};
> +
> +		nand@1ac00000 {
> +			status = "ok";
> +
> +			pinctrl-0 = <&nand_pins>;
> +			pinctrl-names = "default";
> +
> +			nand-ecc-strength = <4>;
> +			nand-bus-width = <8>;
> +		};
>  	};
>  };
> +
> +&adm_dma {
> +	status = "ok";
> +};
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
> 

-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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Thread

[PATCH v3 0/5] mtd: Qualcomm NAND controller driver Archit Taneja <architt@codeaurora.org> - 2015-08-03 07:10 +0200
  [PATCH v3 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja <architt@codeaurora.org> - 2015-08-03 07:10 +0200
  [PATCH v3 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja <architt@codeaurora.org> - 2015-08-03 07:10 +0200
    Re: [PATCH v3 2/5] mtd: nand: Qualcomm NAND controller driver Stephen Boyd <sboyd@codeaurora.org> - 2015-08-04 01:40 +0200
  [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Archit Taneja <architt@codeaurora.org> - 2015-08-03 07:10 +0200
    Re: [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148  platform Andy Gross <agross@codeaurora.org> - 2015-08-03 21:40 +0200
      Re: [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148  platform Archit Taneja <architt@codeaurora.org> - 2015-08-04 17:10 +0200
    Re: [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148  platform Stephen Boyd <sboyd@codeaurora.org> - 2015-08-03 23:00 +0200

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