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Re: [PATCH v2 0/6] ARC: spinlocks/atomics rework

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On Mon, Aug 03, 2015 at 08:06:02PM +0530, Vineet Gupta wrote:
> The PREFETCHW workaround for llock/scond livelock was not sufficient after
> all and we had to do some work there. Extending testing of quad core FPGA
> builds shows things pretty stable, whereas w/o patches some of the LTP tests
> (shm_open/23-1) would cause the system to go bonkers.
> 

Nothing obviously broken with this,

Acked-by: Peter Zijlstra (Intel) <peterz@infraded.org>


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[PATCH v2 0/6] ARC: spinlocks/atomics rework Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-08-03 16:40 +0200
  [PATCH v2 1/6] Revert "ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelock" Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-08-03 16:40 +0200
  [PATCH v2 5/6] ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponential backoff Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-08-03 16:40 +0200
  [PATCH v2 4/6] ARC: LLOCK/SCOND based rwlock Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-08-03 16:40 +0200
  Re: [PATCH v2 0/6] ARC: spinlocks/atomics rework Peter Zijlstra <peterz@infradead.org> - 2015-08-03 16:50 +0200

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