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Groups > linux.kernel > #1199786
| From | Geert Uytterhoeven <geert+renesas@glider.be> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v4 06/16] ARM: shmobile: r7s72100 dtsi: Add CPG/MSTP Clock Domain |
| Date | 2015-08-04 14:40 +0200 |
| Message-ID | <pTJFE-2bp-23@gated-at.bofh.it> (permalink) |
| References | <pTJvX-1ZY-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> --- v4: - Add Reviewed-by, v3: - Use "CPG/MSTP Clock Domain" instead of "CPG Clock Domain", v2: - New. --- arch/arm/boot/dts/r7s72100.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index 277e73c110e5d40c..060c32cbd66923ed 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -86,6 +86,7 @@ reg = <0xfcfe0000 0x18>; clocks = <&extal_clk>, <&usb_x1_clk>; clock-output-names = "pll", "i", "g"; + #power-domain-cells = <0>; }; /* MSTP clocks */ @@ -157,6 +158,7 @@ <0 189 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF0>; clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -169,6 +171,7 @@ <0 193 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF1>; clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -181,6 +184,7 @@ <0 197 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF2>; clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -193,6 +197,7 @@ <0 201 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF3>; clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -205,6 +210,7 @@ <0 205 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF4>; clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -217,6 +223,7 @@ <0 209 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF5>; clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -229,6 +236,7 @@ <0 213 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF6>; clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -241,6 +249,7 @@ <0 217 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF7>; clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -252,6 +261,7 @@ <0 240 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI0>; + power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -266,6 +276,7 @@ <0 243 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI1>; + power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -280,6 +291,7 @@ <0 246 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI2>; + power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -294,6 +306,7 @@ <0 249 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI3>; + power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -308,6 +321,7 @@ <0 252 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI4>; + power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -338,6 +352,7 @@ <0 164 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R7S72100_CLK_I2C0>; clock-frequency = <100000>; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -356,6 +371,7 @@ <0 172 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R7S72100_CLK_I2C1>; clock-frequency = <100000>; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -374,6 +390,7 @@ <0 180 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R7S72100_CLK_I2C2>; clock-frequency = <100000>; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -392,6 +409,7 @@ <0 188 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R7S72100_CLK_I2C3>; clock-frequency = <100000>; + power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -402,6 +420,7 @@ interrupt-names = "tgi0a"; clocks = <&mstp3_clks R7S72100_CLK_MTU2>; clock-names = "fck"; + power-domains = <&cpg_clocks>; status = "disabled"; }; }; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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[PATCH v4 00/16] ARM: shmobile: Add CPG/MSTP Clock Domain Geert Uytterhoeven <geert+renesas@glider.be> - 2015-08-04 14:40 +0200
[PATCH v4 11/16] ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain Geert Uytterhoeven <geert+renesas@glider.be> - 2015-08-04 14:40 +0200
[PATCH v4 01/16] clk: shmobile: Add CPG/MSTP Clock Domain support Geert Uytterhoeven <geert+renesas@glider.be> - 2015-08-04 14:40 +0200
[PATCH v4 12/16] ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain Geert Uytterhoeven <geert+renesas@glider.be> - 2015-08-04 14:40 +0200
[PATCH v4 06/16] ARM: shmobile: r7s72100 dtsi: Add CPG/MSTP Clock Domain Geert Uytterhoeven <geert+renesas@glider.be> - 2015-08-04 14:40 +0200
[PATCH v4 16/16] ARM: shmobile: R-Mobile: Use CPG/MSTP Clock Domain attach/detach helpers Geert Uytterhoeven <geert+renesas@glider.be> - 2015-08-04 14:40 +0200
[PATCH v4 02/16] clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support Geert Uytterhoeven <geert+renesas@glider.be> - 2015-08-04 14:40 +0200
[PATCH v4 07/16] ARM: shmobile: r8a7778 dtsi: Add CPG/MSTP Clock Domain Geert Uytterhoeven <geert+renesas@glider.be> - 2015-08-04 14:40 +0200
Re: [PATCH v4 00/16] ARM: shmobile: Add CPG/MSTP Clock Domain Simon Horman <horms@verge.net.au> - 2015-08-04 15:50 +0200
Re: [PATCH v4 00/16] ARM: shmobile: Add CPG/MSTP Clock Domain Simon Horman <horms@verge.net.au> - 2015-08-05 03:00 +0200
Re: [PATCH v4 00/16] ARM: shmobile: Add CPG/MSTP Clock Domain Geert Uytterhoeven <geert@linux-m68k.org> - 2015-08-05 09:00 +0200
Re: [PATCH v4 00/16] ARM: shmobile: Add CPG/MSTP Clock Domain Simon Horman <horms@verge.net.au> - 2015-08-06 03:00 +0200
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