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Groups > linux.kernel > #1197138
| From | santosh shilimkar <santosh.shilimkar@oracle.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/2] ARM: dts: keystone: fix dt bindings to use post div register for mainpll |
| Date | 2015-07-31 17:40 +0200 |
| Message-ID | <pSkzG-1wQ-35@gated-at.bofh.it> (permalink) |
| References | <pvv19-jr-49@gated-at.bofh.it> <pvv1a-jr-59@gated-at.bofh.it> <pSjtT-8qM-5@gated-at.bofh.it> |
| Organization | Oracle Corporation |
On 7/31/2015 7:20 AM, Murali Karicheri wrote: > On 05/29/2015 12:04 PM, Murali Karicheri wrote: >> All of the keystone devices have a separate register to hold post >> divider value for main pll clock. Currently the fixed-postdiv >> value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to >> use a value of 2 for this. Now that we have fixed this in the pll >> clock driver change the dt bindings for the same. >> >> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> >> --- [..] > Santosh, > > The clk driver update is already merged to v4.2-rc. Could you send this > DT update as well for 4.2-rc? > Sure. Regards, Santosh -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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Re: [PATCH 2/2] ARM: dts: keystone: fix dt bindings to use post div register for mainpll santosh shilimkar <santosh.shilimkar@oracle.com> - 2015-07-31 17:40 +0200
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