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Groups > linux.kernel > #1194976

[PATCH v3 5/6] mmc: sdhci-esdhc-imx: config watermark level and burst length

From Haibo Chen <haibo.chen@freescale.com>
Newsgroups linux.kernel
Subject [PATCH v3 5/6] mmc: sdhci-esdhc-imx: config watermark level and burst length
Date 2015-07-29 11:10 +0200
Message-ID <pRvx9-3Dq-27@gated-at.bofh.it> (permalink)
References <pRvx8-3Dq-7@gated-at.bofh.it>
Organization linux.* mail to news gateway

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i.MX7D support eMMC HS400 mode, this mode can run in 8 bit,200MHZ
DDR mode. So the I/O speed improve a lot compare to SD3.0

The default burst length is 8, if we don't change this value, in
HS400 mode, when we do eMMC read operation, we can find that the
clock signal will stop for a period of time. This means the speed
of data moving on AHB bus is slower than I/O speed. So we should
improve the speed of data moving on AHB bus.

For imx7d usdhc, this patch set the burst length as 16, and set
watermark level as 64. The test result is the clock signal has
no stop during the eMMC HS400 operation. For other imx usdhc, remain
the default value: burst length as 8, watermark level as 16.

Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
---
 drivers/mmc/host/sdhci-esdhc-imx.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 158f93b..37d0095 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -239,6 +239,11 @@ static inline int is_imx6q_usdhc(struct pltfm_imx_data *data)
 	return data->socdata == &usdhc_imx6q_data;
 }
 
+static inline int is_imx7d_usdhc(struct pltfm_imx_data *data)
+{
+	return data->socdata == &usdhc_imx7d_data;
+}
+
 static inline int esdhc_is_usdhc(struct pltfm_imx_data *data)
 {
 	return !!(data->socdata->flags & ESDHC_FLAG_USDHC);
@@ -1145,7 +1150,11 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
 	 * to something insane.  Change it back here.
 	 */
 	if (esdhc_is_usdhc(imx_data)) {
-		writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL);
+		if (is_imx7d_usdhc(imx_data))
+			writel(0x10401040, host->ioaddr + ESDHC_WTMK_LVL);
+		else
+			writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL);
+
 		host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
 		host->mmc->caps |= MMC_CAP_1_8V_DDR;
 
-- 
1.9.1

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Thread

[PATCH v3 0/6] mmc: imx: a few fixes and new feature Haibo Chen <haibo.chen@freescale.com> - 2015-07-29 11:10 +0200
  [PATCH v3 6/6] mmc: sdhci-esdhc-imx: set back the burst_length_enable bit to 1 Haibo Chen <haibo.chen@freescale.com> - 2015-07-29 11:10 +0200
  [PATCH v3 5/6] mmc: sdhci-esdhc-imx: config watermark level and burst length Haibo Chen <haibo.chen@freescale.com> - 2015-07-29 11:10 +0200
    Re: [PATCH v3 5/6] mmc: sdhci-esdhc-imx: config watermark level and  burst length Russell King - ARM Linux <linux@arm.linux.org.uk> - 2015-07-31 17:20 +0200
  Re: [PATCH v3 0/6] mmc: imx: a few fixes and new feature Dong Aisheng <b29396@freescale.com> - 2015-07-29 11:20 +0200
    Re: [PATCH v3 0/6] mmc: imx: a few fixes and new feature Holger Schurig <holgerschurig@gmail.com> - 2015-07-30 11:50 +0200

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