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Groups > linux.kernel > #1190657
| From | Pavel Machek <pavel@denx.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v9 2/7] staging: usage documentation for simple fpga bus |
| Date | 2015-07-23 08:50 +0200 |
| Message-ID | <pPium-7ld-5@gated-at.bofh.it> (permalink) |
| References | <pNhCq-3Dd-17@gated-at.bofh.it> <pPium-7ld-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Fri 2015-07-17 10:51:12, atull@opensource.altera.com wrote: > From: Alan Tull <atull@opensource.altera.com> > > Add a document spelling out usage of the simple fpga bus. > +The DT overlay includes bindings (documented in bindings/simple-fpga-bus.txt) > +that specify: > + * Which fpga manager to use fpga->FPGA, globally. > + * Which image file to load > + * Flags indicating whether this this image is for full reconfiguration or > + partial. > + * a list of resets that should be released. These enable the FPGA bridges. > + * child nodes specifying the devices that will be added with appropriate > + compatible strings, etc. Either all entries in the list should start with big letter or none should. Also . at end of line should be consistent. > + Sequence > + -------- > + 1. Load the DT overlay. One convenient way to do that is to use Pantelis' > + handy configfs interface (more below). Reader has no chance to know what Pantelis' configfs interface is, and there's nothing below. > + 2. The simple FPGA bus gets probed and will do the following: > + a. call the fpga manager core to program the FPGA > + b. release the FPGA bridges > + c. call of_platform_populate resulting in device drivers getting probed. > + -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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Re: [PATCH v9 2/7] staging: usage documentation for simple fpga bus Pavel Machek <pavel@denx.de> - 2015-07-23 08:50 +0200
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