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Re: [PATCH v4 3/6] cpufreq: powernv: Register for OCC related opal_message notification

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Hello,

On Mon, 2015-07-13 at 19:39 +0530, Shilpasri G Bhat wrote:
> diff --git a/drivers/cpufreq/powernv-cpufreq.c b/drivers/cpufreq/powernv-cpufreq.c
> index d0c18c9..1f59958 100644
> --- a/drivers/cpufreq/powernv-cpufreq.c
> +++ b/drivers/cpufreq/powernv-cpufreq.c
> @@ -414,6 +415,71 @@ static struct notifier_block powernv_cpufreq_reboot_nb = {
>  	.notifier_call = powernv_cpufreq_reboot_notifier,
>  };
>  
> +static char throttle_reason[][30] = {
> +					"No throttling",
> +					"Power Cap",
> +					"Processor Over Temperature",
> +					"Power Supply Failure",
> +					"Over Current",
> +					"OCC Reset"
> +				     };
> +
> +static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
> +				   unsigned long msg_type, void *_msg)
> +{
> +	struct opal_msg *msg = _msg;
> +	struct opal_occ_msg omsg;
> +
> +	if (msg_type != OPAL_MSG_OCC)
> +		return 0;
> +
> +	memcpy(&omsg, msg->params, sizeof(omsg));

You need to ensure the of the members of struct opal_occ_msg are in the
correct byte order when copying them over.

Have you tested this code with in a little endian configuration?

Do the messages you're sending make sense for a system that has a BMC
instead of a FSP?

Cheers,

Joel

> +
> +	switch (omsg.type) {

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Re: [PATCH v4 3/6] cpufreq: powernv: Register for OCC related  opal_message notification Joel Stanley <joel@jms.id.au> - 2015-07-15 08:20 +0200
  Re: [PATCH v4 3/6] cpufreq: powernv: Register for OCC related opal_message  notification Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> - 2015-07-15 12:20 +0200

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