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[PATCH 02/28] alpha: Provide atomic_{or,xor,and}

From Peter Zijlstra <peterz@infradead.org>
Newsgroups linux.kernel
Subject [PATCH 02/28] alpha: Provide atomic_{or,xor,and}
Date 2015-07-16 19:40 +0200
Message-ID <pMViA-57c-57@gated-at.bofh.it> (permalink)
References <pMVix-57c-3@gated-at.bofh.it>
Organization linux.* mail to news gateway

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Implement atomic logic ops -- atomic_{or,xor,and}.

These will replace the atomic_{set,clear}_mask functions that are
available on some archs.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/alpha/include/asm/atomic.h |   43 ++++++++++++++++++++++++++--------------
 1 file changed, 28 insertions(+), 15 deletions(-)

--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -29,13 +29,13 @@
  * branch back to restart the operation.
  */
 
-#define ATOMIC_OP(op)							\
+#define ATOMIC_OP(op, asm_op)						\
 static __inline__ void atomic_##op(int i, atomic_t * v)			\
 {									\
 	unsigned long temp;						\
 	__asm__ __volatile__(						\
 	"1:	ldl_l %0,%1\n"						\
-	"	" #op "l %0,%2,%0\n"					\
+	"	" #asm_op " %0,%2,%0\n"					\
 	"	stl_c %0,%1\n"						\
 	"	beq %0,2f\n"						\
 	".subsection 2\n"						\
@@ -45,15 +45,15 @@ static __inline__ void atomic_##op(int i
 	:"Ir" (i), "m" (v->counter));					\
 }									\
 
-#define ATOMIC_OP_RETURN(op)						\
+#define ATOMIC_OP_RETURN(op, asm_op)					\
 static inline int atomic_##op##_return(int i, atomic_t *v)		\
 {									\
 	long temp, result;						\
 	smp_mb();							\
 	__asm__ __volatile__(						\
 	"1:	ldl_l %0,%1\n"						\
-	"	" #op "l %0,%3,%2\n"					\
-	"	" #op "l %0,%3,%0\n"					\
+	"	" #asm_op " %0,%3,%2\n"					\
+	"	" #asm_op " %0,%3,%0\n"					\
 	"	stl_c %0,%1\n"						\
 	"	beq %0,2f\n"						\
 	".subsection 2\n"						\
@@ -65,13 +65,13 @@ static inline int atomic_##op##_return(i
 	return result;							\
 }
 
-#define ATOMIC64_OP(op)							\
+#define ATOMIC64_OP(op, asm_op)						\
 static __inline__ void atomic64_##op(long i, atomic64_t * v)		\
 {									\
 	unsigned long temp;						\
 	__asm__ __volatile__(						\
 	"1:	ldq_l %0,%1\n"						\
-	"	" #op "q %0,%2,%0\n"					\
+	"	" #asm_op " %0,%2,%0\n"					\
 	"	stq_c %0,%1\n"						\
 	"	beq %0,2f\n"						\
 	".subsection 2\n"						\
@@ -81,15 +81,15 @@ static __inline__ void atomic64_##op(lon
 	:"Ir" (i), "m" (v->counter));					\
 }									\
 
-#define ATOMIC64_OP_RETURN(op)						\
+#define ATOMIC64_OP_RETURN(op, asm_op)					\
 static __inline__ long atomic64_##op##_return(long i, atomic64_t * v)	\
 {									\
 	long temp, result;						\
 	smp_mb();							\
 	__asm__ __volatile__(						\
 	"1:	ldq_l %0,%1\n"						\
-	"	" #op "q %0,%3,%2\n"					\
-	"	" #op "q %0,%3,%0\n"					\
+	"	" #asm_op " %0,%3,%2\n"					\
+	"	" #asm_op " %0,%3,%0\n"					\
 	"	stq_c %0,%1\n"						\
 	"	beq %0,2f\n"						\
 	".subsection 2\n"						\
@@ -101,15 +101,28 @@ static __inline__ long atomic64_##op##_r
 	return result;							\
 }
 
-#define ATOMIC_OPS(opg)							\
-	ATOMIC_OP(opg)							\
-	ATOMIC_OP_RETURN(opg)						\
-	ATOMIC64_OP(opg)						\
-	ATOMIC64_OP_RETURN(opg)
+#define ATOMIC_OPS(op)							\
+	ATOMIC_OP(op, op##l)						\
+	ATOMIC_OP_RETURN(op, op##l)					\
+	ATOMIC64_OP(op, op##q)						\
+	ATOMIC64_OP_RETURN(op, op##q)
 
 ATOMIC_OPS(add)
 ATOMIC_OPS(sub)
 
+#define CONFIG_ARCH_HAS_ATOMIC_OR
+#define atomic_andnot atomic_andnot
+#define atomic64_andnot atomic64_andnot
+
+ATOMIC_OP(and, and)
+ATOMIC_OP(andnot, bic)
+ATOMIC_OP(or, bis)
+ATOMIC_OP(xor, xor)
+ATOMIC64_OP(and, and)
+ATOMIC64_OP(andnot, bic)
+ATOMIC64_OP(or, bis)
+ATOMIC64_OP(xor, xor)
+
 #undef ATOMIC_OPS
 #undef ATOMIC64_OP_RETURN
 #undef ATOMIC64_OP


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Thread

[PATCH 00/28] arch: Provide atomic logic ops Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:40 +0200
  [PATCH 19/28] xtensa: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:40 +0200
  [PATCH 02/28] alpha: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:40 +0200
  [PATCH 20/28] s390: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 22/28] frv: Rewrite atomic implementation Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 25/28] atomic: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 05/28] arm64: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 13/28] mips: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 14/28] mn10300: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 12/28] metag: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 26/28] atomic: Collapse all atomic_{set,clear}_mask definitions Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 04/28] arm: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 08/28] hexagon: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 11/28] m68k: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 17/28] sh: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  [PATCH 24/28] tile: Provide atomic_{or,xor,and} Peter Zijlstra <peterz@infradead.org> - 2015-07-16 19:50 +0200
  Re: [PATCH 00/28] arch: Provide atomic logic ops Will Deacon <will.deacon@arm.com> - 2015-07-17 15:00 +0200

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