Re: [PATCH v2 4/6] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets

From	Paul Walmsley <paul@pwsan.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH v2 4/6] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets
Date	2015-07-16 04:50 +0200
Message-ID	<pMHpf-1R5-3@gated-at.bofh.it> (permalink)
References	<pJQp4-7bG-9@gated-at.bofh.it> <pJQp4-7bG-15@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Wed, 8 Jul 2015, Keerthy wrote:

> The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
> This makes it difficult to reuse the code for SoCs like AM437x that have
> a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
> Hence handling the case using offset of 4 to accommodate single set of IRQ*
> registers generically.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>

Thanks, queued for v4.3.


- Paul
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Re: [PATCH v2 4/6] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2  and IRQSTATUS_MPU_2 register offsets Paul Walmsley <paul@pwsan.com> - 2015-07-16 04:50 +0200

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