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Groups > linux.debian.kernel > #74418
| From | Alex Deucher <alexdeucher@gmail.com> |
|---|---|
| Newsgroups | linux.debian.bugs.dist, linux.debian.kernel |
| Subject | Bug#1005005: same behavior on my MSI Bravo 17 A4DDR : second resume fails and exception in kernel traces |
| Date | 2022-02-16 21:10 +0100 |
| Message-ID | <DRyMF-2gNz-5@gated-at.bofh.it> (permalink) |
| References | <DRaAF-21Dp-1@gated-at.bofh.it> <DRcVP-22Vo-7@gated-at.bofh.it> <DRyMF-2gNz-7@gated-at.bofh.it> <DNqE1-3rd-1@gated-at.bofh.it> <DRyMF-2gNz-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Cross-posted to 2 groups.
On Wed, Feb 16, 2022 at 2:56 PM Eric Valette <eric.valette@free.fr> wrote: > > On Tue, 15 Feb 2022 15:42:27 -0500 Alex Deucher <alexdeucher@gmail.com> > wrote: > > What chip is this? Can you provide the full dmesg output? > > Its a a renoir chip with a second gpu : [Radeon RX 5500/5500M / Pro 5500M]. Thanks. Can you attach the dmesg output? Can you bisect? Alex > > > Processor Information > Socket Designation: FP6 > Type: Central Processor > Family: Zen > Manufacturer: Advanced Micro Devices, Inc. > ID: 01 0F 86 00 FF FB 8B 17 > Signature: Family 23, Model 96, Stepping 1 > Flags: > FPU (Floating-point unit on-chip) > VME (Virtual mode extension) > DE (Debugging extension) > PSE (Page size extension) > TSC (Time stamp counter) > MSR (Model specific registers) > PAE (Physical address extension) > MCE (Machine check exception) > CX8 (CMPXCHG8 instruction supported) > APIC (On-chip APIC hardware supported) > SEP (Fast system call) > MTRR (Memory type range registers) > PGE (Page global enable) > MCA (Machine check architecture) > CMOV (Conditional move instruction supported) > PAT (Page attribute table) > PSE-36 (36-bit page size extension) > CLFSH (CLFLUSH instruction supported) > MMX (MMX technology supported) > FXSR (FXSAVE and FXSTOR instructions supported) > SSE (Streaming SIMD extensions) > SSE2 (Streaming SIMD extensions 2) > HTT (Multi-threading) > Version: AMD Ryzen 7 4800H with Radeon Graphics > Voltage: 1.2 V > External Clock: 100 MHz > Max Speed: 4300 MHz > Current Speed: 2900 MHz > Status: Populated, Enabled > Upgrade: None > L1 Cache Handle: 0x000D > L2 Cache Handle: 0x000E > L3 Cache Handle: 0x000F > Serial Number: Unknown > Asset Tag: Unknown > Part Number: Unknown > Core Count: 8 > Core Enabled: 8 > Thread Count: 16 > Characteristics: > 64-bit capable > Multi-Core > Hardware Thread > Execute Protection > Enhanced Virtualization > Power/Performance Control
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Bug#1005005: same behavior on my MSI Bravo 17 A4DDR : second resume fails and exception in kernel traces Eric Valette <eric.valette@free.fr> - 2022-02-15 19:20 +0100
Bug#1005005: same behavior on my MSI Bravo 17 A4DDR : second resume fails and exception in kernel traces Eric Valette <eric.valette@free.fr> - 2022-02-15 19:40 +0100
Bug#1005005: same behavior on my MSI Bravo 17 A4DDR : second resume fails and exception in kernel traces Alex Deucher <alexdeucher@gmail.com> - 2022-02-15 21:50 +0100
Bug#1005005: same behavior on my MSI Bravo 17 A4DDR : second resume fails and exception in kernel traces Alex Deucher <alexdeucher@gmail.com> - 2022-02-16 21:10 +0100
Bug#1005005: same behavior on my MSI Bravo 17 A4DDR : second resume fails and exception in kernel traces Eric Valette <eric.valette@free.fr> - 2022-02-16 22:40 +0100
Bug#1005005: same behavior on my MSI Bravo 17 A4DDR : second resume fails and exception in kernel traces Eric Valette <eric.valette@free.fr> - 2022-04-10 12:30 +0200
Bug#1005005: same behavior on my MSI Bravo 17 A4DDR : second resume fails and exception in kernel traces Eric Valette <eric.valette@free.fr> - 2022-02-16 21:10 +0100
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