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A2osX : Now Preemptive .....and still lacking contributors!

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  A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remygibert63@gmail.com> - 2018-05-24 08:35 -0700
    Re: A2osX : Now Preemptive .....and still lacking contributors! Jean-Michel Paris <paris.jean.michel@gmail.com> - 2018-05-24 13:29 -0700
      Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-05-26 03:19 -0700
    A2osX : Now Preemptive .....and still lacking contributors! Jonathan Roseberry <jonathan.roseberry4@gmail.com> - 2018-05-25 17:25 -0700
      Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-05-25 23:55 -0700
    Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-06-09 10:09 -0700
    Re: A2osX : Now Preemptive .....and still lacking contributors! Jean-Michel Paris <paris.jean.michel@gmail.com> - 2018-06-10 05:45 -0700
      Re: A2osX : Now Preemptive .....and still lacking contributors! Antoine Vignau <antoine.vignau@laposte.net> - 2018-06-11 21:17 -0700
        Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-06-12 03:24 -0700
    Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-06-29 04:30 -0700
      Re: A2osX : Now Preemptive .....and still lacking contributors! Antoine Vignau <antoine.vignau@laposte.net> - 2018-06-30 05:28 -0700
        Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-06-30 07:01 -0700
          Re: A2osX : Now Preemptive .....and still lacking contributors! MG <*@guidero.us> - 2018-06-30 12:45 -0700
            Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-06-30 23:11 -0700
              Re: A2osX : Now Preemptive .....and still lacking contributors! ol.sc@web.de (Oliver Schmidt) - 2018-07-02 08:49 +0000
                Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-07-02 06:33 -0700
                  Re: A2osX : Now Preemptive .....and still lacking contributors! MG <*@guidero.us> - 2018-07-02 22:30 -0700
                    Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-07-03 10:39 -0700
                      Re: A2osX : Now Preemptive .....and still lacking contributors! barana <barana24@hotmail.com> - 2018-07-13 22:59 -0700
                        Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-07-14 00:00 -0700
                          Re: A2osX : Now Preemptive .....and still lacking contributors! barana <barana24@hotmail.com> - 2018-07-14 00:50 -0700
                            Re: A2osX : Now Preemptive .....and still lacking contributors! remy gibert <remy.gibert@free.fr> - 2018-07-14 01:18 -0700
      Re: A2osX : Now Preemptive .....and still lacking contributors! MG <*@guidero.us> - 2018-06-30 12:40 -0700

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#4550 — A2osX : Now Preemptive .....and still lacking contributors!

All is there :

https://github.com/burniouf/A2osX

I need testers, coders, hardware providers, help....

If anybody want to join this project...

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#4551

Le jeudi 24 mai 2018 17:35:01 UTC+2, remy gibert a écrit :
> All is there :
> 
> https://github.com/burniouf/A2osX
> 
> I need testers, coders, hardware providers, help....
> 
> If anybody want to join this project...

It's a great project, you have to support him!

I'm free for testing A2osX.dsk anytime on real hardware ;)

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#4554

Le jeudi 24 mai 2018 22:29:43 UTC+2, Jean-Michel Paris a écrit :
> Le jeudi 24 mai 2018 17:35:01 UTC+2, remy gibert a écrit :
> > All is there :
> > 
> > https://github.com/burniouf/A2osX
> > 
> > I need testers, coders, hardware providers, help....
> > 
> > If anybody want to join this project...
> 
> It's a great project, you have to support him!
> 
> I'm free for testing A2osX.dsk anytime on real hardware ;)

Hello JM!

Please report issues at GitHub.

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#4552

I would love to help out! Where do we sign up?

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#4553

Le samedi 26 mai 2018 02:25:18 UTC+2, Jonathan Roseberry a écrit :
> I would love to help out! Where do we sign up?

Great!

If not already done, create an account at GitHub.
a good start should be reading/commenting:

https://github.com/burniouf/A2osX/issues/29

PM me your skills and in which area (test,dev...etc...) you'll be glad to contribute.

Thanx

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#4586

Le jeudi 24 mai 2018 17:35:01 UTC+2, remy gibert a écrit :
> All is there :
> 
> https://github.com/burniouf/A2osX
> 
> I need testers, coders, hardware providers, help....
> 
> If anybody want to join this project...

Nobody ?

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#4587

Le jeudi 24 mai 2018 17:35:01 UTC+2, remy gibert a écrit :
> All is there :
> 
> https://github.com/burniouf/A2osX
> 
> I need testers, coders, hardware providers, help....
> 
> If anybody want to join this project...


Ok, I'll gather inputs into GitHub

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#4588

Rémy,
please read comp.sys.apple2, a couple of persons would like to exchange with you,
av

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#4589

Le mardi 12 juin 2018 06:17:46 UTC+2, Antoine Vignau a écrit :
> Rémy,
> please read comp.sys.apple2, a couple of persons would like to exchange with you,
> av

oops....did not realized you also published to comp.sys.apple...

Thanx!

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#4623

Le jeudi 24 mai 2018 17:35:01 UTC+2, remy gibert a écrit :
> All is there :
> 
> https://github.com/burniouf/A2osX
> 
> I need testers, coders, hardware providers, help....
> 
> If anybody want to join this project...

Quick Z80 Questions :

I'm currently rewriting the whole A2osX kernel, and i reach the part of the code that handle Code segment management & 65c02 relocation.

I want it to be extended to Z80, and i'm not an expert on this processor.

- is a piece of Z80 code could be relocatable od do i need to add an opcode parser and a relocator for Z80 ?

i know there is 2 main families of Z80 board achitecture : Microsoft Z80 (& clones) and PCPI applicard.

- is anybody aware of developer documentation about PCPI, specially dealing about IRQ ?

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#4632

Try here: http://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Z80%20Cards/

av

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#4633

Le samedi 30 juin 2018 14:28:58 UTC+2, Antoine Vignau a écrit :
> Try here: http://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Z80%20Cards/
> 
> av

Thanx Antoine!

Already read the OEM manual, but i need confirmation that the Apple IRQ/NMI lines are NOT linked to Z80 IRQ/NMI....only accessing I/O C0n6 & C0n7 interrupt the Z80.

For MS softcard, i need confirmation that SI-4 is OFF, Z80 is halted and 6502 is awaken in IRQ state.

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#4635

On Saturday, June 30, 2018 at 7:01:56 AM UTC-7, remy gibert wrote:
> Le samedi 30 juin 2018 14:28:58 UTC+2, Antoine Vignau a écrit :
> > Try here: http://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Z80%20Cards/
> > 
> > av
> 
> Thanx Antoine!
> 
> Already read the OEM manual, but i need confirmation that the Apple IRQ/NMI lines are NOT linked to Z80 IRQ/NMI....only accessing I/O C0n6 & C0n7 interrupt the Z80.

I believe this is correct.  Additionally, as I mentioned before the C0x6 line is only functional if the CTC is installed.

> For MS softcard, i need confirmation that SI-4 is OFF, Z80 is halted and 6502 is awaken in IRQ state.

This is incorrect.  When an IRQ occurs, the 6502 has an IRQ response pending, but the Z80 stays active until it voluntarily gives up control.  It is probably for this reason that the SoftCard BIOS generally uses 6502 code to do menial things like read the keyboard, because it gives the opportunity for the 6502 to service interrupts.

MG

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#4636

Le samedi 30 juin 2018 21:45:34 UTC+2, MG a écrit :
> On Saturday, June 30, 2018 at 7:01:56 AM UTC-7, remy gibert wrote:
> > Le samedi 30 juin 2018 14:28:58 UTC+2, Antoine Vignau a écrit :
> > > Try here: http://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Z80%20Cards/
> > > 
> > > av
> > 
> > Thanx Antoine!
> > 
> > Already read the OEM manual, but i need confirmation that the Apple IRQ/NMI lines are NOT linked to Z80 IRQ/NMI....only accessing I/O C0n6 & C0n7 interrupt the Z80.
> 
> I believe this is correct.  Additionally, as I mentioned before the C0x6 line is only functional if the CTC is installed.
> 
> > For MS softcard, i need confirmation that SI-4 is OFF, Z80 is halted and 6502 is awaken in IRQ state.
> 
> This is incorrect.  When an IRQ occurs, the 6502 has an IRQ response pending, but the Z80 stays active until it voluntarily gives up control.  It is probably for this reason that the SoftCard BIOS generally uses 6502 code to do menial things like read the keyboard, because it gives the opportunity for the 6502 to service interrupts.
> 
> MG

Thank you for these usefull links & informations.

The good news is that no particular Z80 IRQ handler has to be written in both cases.

The bad news, if a Z80 process is running, it could not be interrupted by "Tick source", so collaborative only, not preemtive.

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#4638

Hi,

>> This is incorrect.  When an IRQ occurs, the 6502 has an IRQ response pend=
>ing, but the Z80 stays active until it voluntarily gives up control.  It is=
> probably for this reason that the SoftCard BIOS generally uses 6502 code t=
>o do menial things like read the keyboard, because it gives the opportunity=
> for the 6502 to service interrupts.

I've done interrupt driven serial I/O from CP/M back then and I
remember it in the same way (with 6502 code) - and I remember that the
Microsoft documention was pretty clear and accurate regarding IRQ
handling.

Regards,
Oliver

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#4639

Le lundi 2 juillet 2018 10:49:08 UTC+2, Oliver Schmidt a écrit :
> Hi,
> 
> >> This is incorrect.  When an IRQ occurs, the 6502 has an IRQ response pend=
> >ing, but the Z80 stays active until it voluntarily gives up control.  It is=
> > probably for this reason that the SoftCard BIOS generally uses 6502 code t=
> >o do menial things like read the keyboard, because it gives the opportunity=
> > for the 6502 to service interrupts.
> 
> I've done interrupt driven serial I/O from CP/M back then and I
> remember it in the same way (with 6502 code) - and I remember that the
> Microsoft documention was pretty clear and accurate regarding IRQ
> handling.
> 
> Regards,
> Oliver

Following Antoine link, I found this :

http://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Z80%20Cards/Microsoft%20SoftCard/Manuals/ Microsoft SoftCard - Software and Hardware Details.pdf

According Schematics, seems S1-4 switched to ON is the solution to interrupt Z80.

So i need a IRQ Handler in the Z80 code that's simply switch back to 6502 to an instruction that switch bacl to Z80. As the 6502 should get also interrupted, the IRQ Handler code should be called between these 2 Lines. 

Z80 IRQ Handler:

LD (0En00H),A
   <Z80-6502 IRQ Handler>
RETI


Z80-6502 IRQ Handler
   <IRQ!>
sta $Cn00  (go back to Z80 RETI)

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#4640

On Monday, July 2, 2018 at 6:33:03 AM UTC-7, remy gibert wrote:
> So i need a IRQ Handler in the Z80 code that's simply switch back to 6502 to an instruction that switch bacl to Z80. As the 6502 should get also interrupted, the IRQ Handler code should be called between these 2 Lines. 
> 
> Z80 IRQ Handler:
> 
> LD (0En00H),A
>    <Z80-6502 IRQ Handler>
> RETI
> 
> 
> Z80-6502 IRQ Handler
>    <IRQ!>
> sta $Cn00  (go back to Z80 RETI)

It's going to be a little more complicated than that.  For the Softcard and compatibles, each processor picks up where it left off (provided there was no intervening reset) each time a write to it's ROM space happens.  You can't just STA $CN00 from the IRQ handler on the 6502 side, since to manage Z80 execution you need to be in a loop like this:

ZLOOP: STA $Cn00
  JSR FF58 (or some other RTS, Z80 code will change this to make 6502 calls)
  ; check for exit condition here.
  JMP ZLOOP

When an interrupt occurs in Z80 mode, the Z80 ISR needs to save the target address of the JSR, set the JSR to $FF58 (or some other RTS), and then STA $En00 to let the 6502 ISR service the interrupt.  After that happens then do whatever work needs to be done in the Z80 ISR.

You're going to find the lack of ability to set the Z80 to a known state to be particularly challenging, and in my opinion is the biggest flaw in the Softcard design.  If you aren't the first program getting control of the Z80 since the last reset, you are not guaranteed you will get control at all and will likely hang or crash.

Assuming you do have control of the Z80, in order to get out of the Z80 for a while and reliably get back in, you'll need to make sure you always exit from a known address after setting the exit condition, that way you know which address to poke a Z80 JP instruction to in order to regain control later.

MG

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#4644

Le mardi 3 juillet 2018 07:30:01 UTC+2, MG a écrit :
> On Monday, July 2, 2018 at 6:33:03 AM UTC-7, remy gibert wrote:
> > So i need a IRQ Handler in the Z80 code that's simply switch back to 6502 to an instruction that switch bacl to Z80. As the 6502 should get also interrupted, the IRQ Handler code should be called between these 2 Lines. 
> > 
> > Z80 IRQ Handler:
> > 
> > LD (0En00H),A
> >    <Z80-6502 IRQ Handler>
> > RETI
> > 
> > 
> > Z80-6502 IRQ Handler
> >    <IRQ!>
> > sta $Cn00  (go back to Z80 RETI)
> 
> It's going to be a little more complicated than that.  For the Softcard and compatibles, each processor picks up where it left off (provided there was no intervening reset) each time a write to it's ROM space happens.  You can't just STA $CN00 from the IRQ handler on the 6502 side, since to manage Z80 execution you need to be in a loop like this:
> 
> ZLOOP: STA $Cn00
>   JSR FF58 (or some other RTS, Z80 code will change this to make 6502 calls)
>   ; check for exit condition here.
>   JMP ZLOOP
> 
> When an interrupt occurs in Z80 mode, the Z80 ISR needs to save the target address of the JSR, set the JSR to $FF58 (or some other RTS), and then STA $En00 to let the 6502 ISR service the interrupt.  After that happens then do whatever work needs to be done in the Z80 ISR.
> 
> You're going to find the lack of ability to set the Z80 to a known state to be particularly challenging, and in my opinion is the biggest flaw in the Softcard design.  If you aren't the first program getting control of the Z80 since the last reset, you are not guaranteed you will get control at all and will likely hang or crash.
> 
> Assuming you do have control of the Z80, in order to get out of the Z80 for a while and reliably get back in, you'll need to make sure you always exit from a known address after setting the exit condition, that way you know which address to poke a Z80 JP instruction to in order to regain control later.
> 
> MG

Yes, i agree! i'm quite sure it will end up with more than 2 lines of Z80 code ;-)

Thanx for your inputs, it make things more clear, now.
My main problem for now is how to insert these Z80 lines inside kernel setup routines. The assembler i use does not knowthis CPU, and the A2osX embedded cross assembler which is able to assemble anything is not yet completed.

Also, to have the complete picture of the Z80 world, i must find out how to handle PCPI type cards and i need to know if there is any 3rd type of Z80 card  i should consider.


Thanx all for your inputs!
Rémy

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#4648

Will your os run existing 8 bit binaries?

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#4649

Le samedi 14 juillet 2018 07:59:37 UTC+2, barana a écrit :
> Will your os run existing 8 bit binaries?

Do you mean another ".SYSTEM" File ?

A2osX installs its own "quit code" to switch to another .SYSTEM file, then come back to KERNEL....but for now, The Kernel is not able yet to quit gracefully every processes and uninstall itself from memory. This is designed for, but required code is still missing.....

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