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Machine language routines for MSM5832

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  Machine language routines for MSM5832 D Finnigan <dog_cow@macgui.com> - 2017-04-01 23:07 +0000

#3407 — Machine language routines for MSM5832

* Micro no. 33 / Feb 1981
* Machine language routines for MSM5832
* Clock/calendar circuit
* Randy Sebra July, 1980

ORB	EQU	$C500 ; Output register B
IORA	EQU	$C501 ; Input/output register A
DDRB	EQU	$C502 ; Data direction register B
DDRA	EQU	$C503 ; Data direction register A
PCR	EQU	$C50C ; Peripheral Control Register
IFR	EQU	$C50D ; Interrupt flag register
IER	EQU	$C50E ; Interrupt enable register

	ORG	$300 ; Start of routines

* Routine to configure Port B
* and set HOLD high

SETUP	LDA	#3F ; Set up PA0-PA5 as outputs
	STA	DDRA ; for address and control
	LDA	#C ; input to HOLD
	LDY	#25 ; Delay 150 microsec for
DELAY	DEY	 ; HOLD time setup
	DNE	DELAY
	RTS	 ; Return

* Read routine

READ	JSR	SETUP ; Set up HOLD
	LDA	#0 ; Configure PB0-PB3 as data
	STA	DDRB ; inputs for read
	LDX	#C ; Initial address
RDLOOP	TXA	 ; Transfer to accumulator and
	ORA	#10 ; combine with READ high
	STA	IORA ; Issue READ
	NOP	 ; Small delay
	NOP	 ; for read access time
	NOP
	LDA	ORB ; Read data
	AND	#F ; Mask off high 4 bits
	STA	E9,X ; Store to Page Zero
	DEX	 ; Decrement address
	BPL	RDLOOP ; Loop until through
	LDA	#E ; Then set HOLD low
	STA	PCR ; by CA2 high
	RTS	 ; Return

* Write routine

WRITE	JSR	SETUP ; Set up HOLD
	LDA	#F ; Configure PB0-PB3 as data
	STA	DDRB ; outputs for write
	LDX	#C ; Set initial address
WRLOOP	LDA	E9,X ; and fetch data
	STA	ORB ; Write data
	TXA	 ; Combine address with
	ORA	#20 ; WRITE high and
	STA	IORA ; issue write
	AND	#F ; Toggle WRITE control
	STA	IORA
	DEX	 ; Decrement address
	BPL	WRLOOP ; Loop until through
	LDA	#E ; Set CA2 high for
	STA	PCR ; low on HOLF
	RTS	 ; Return

* Interrupt setup routine

IRQ	LDA	#0 ; Set up B0-B3 (data
	STA	DDRB ; lines) as inputs
	LDA	#1F ; Set up A0-A4 (address
	STA	DDRA ; lines and READ) as
	STA	IORA ; outputs and set all high
	LDA	#8 ; Set up IFR for interrupt
	STA	IFR ; from CB2
	LDA	#88 ; Enable interrupt for
	STA	IER ; CB2
	RTS	 ; Return

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