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standard interface to aux RAM or RWIII RAM?

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  standard interface to aux RAM or RWIII RAM? aiiadict@gmail.com - 2012-05-10 18:07 -0700
    Re: standard interface to aux RAM or RWIII RAM? David Schmenk <dschmenk@gmail.com> - 2012-05-10 19:41 -0700
    Re: standard interface to aux RAM or RWIII RAM? aiiadict@gmail.com - 2012-05-11 09:31 -0700
      Re: standard interface to aux RAM or RWIII RAM? aiiadict@gmail.com - 2012-05-11 17:42 -0700
        Re: standard interface to aux RAM or RWIII RAM? aiiadict@gmail.com - 2012-05-12 15:31 -0700
          Re: standard interface to aux RAM or RWIII RAM? aiiadict@gmail.com - 2012-05-12 15:58 -0700
            Re: standard interface to aux RAM or RWIII RAM? "ict@ccess" <gids.rs@sasktel.net> - 2012-05-21 20:53 -0700
              Re: standard interface to aux RAM or RWIII RAM? aiiadict@gmail.com - 2012-05-25 16:19 -0700

#294 — standard interface to aux RAM or RWIII RAM?

any ideas?  

libraries available ?

accepted ways?

span data/programs across banks?
send data/programs across banks?
to/from main/RAM

before I write mine....

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#295

On Thursday, May 10, 2012 6:07:56 PM UTC-7, aiia...@gmail.com wrote:
> any ideas?  
> 
> libraries available ?
> 
> accepted ways?
> 
> span data/programs across banks?
> send data/programs across banks?
> to/from main/RAM
> 
> before I write mine....

Don't overlook the simplicity and compatibility across different memory cards by using a ProDOS RAMDisk.  There are ways to organize your files on such a disk to get reasonable performance.  Perhaps not as fast as native access, but acceptable for many uses (think swap disk).  In any rate, it might be easier to mock up different scenarios using file access calls before committing to a final native design.

Dave...

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#296

On Thursday, May 10, 2012 6:07:56 PM UTC-7, aiia...@gmail.com wrote:
> any ideas?  

page 7-3 of Beneath Apple Prodos has a Memory map of Prodos.

Prodos Kernel occupies $d000 to $FFFF RAM in the LC area.

How to interpret the rest of the memory map?

for instance, where is the quit code???

what is the other RAM area to the right of the aux RAM
graphic?


there are two large areas of RAM to use.  lower 48k, Upper
16k(LC, language card area)

In the lower 48, you can choose to read and write
to main/aux.  You can read from main, write to aux,
etc..

in the Upper 16k, you choose to READ/WRITE to aux
or MAIN.  You cannot read from one and write to the
other directly.

It looks like the LC area is the best place for a
program that wants to access a large amount of 
DATA (the lower 48k).  If you want access to other
RWIII AUX pages, you would need to put your program
in those other AUX LC areas (upper 16k)

Using the lower 48k for program, you can access
multiple LC areas, but each time you switch a new
one in, the stack is retrieved from that bank.

I am working on making an animated GIF to show
how the softswitches work, what is where, and the
boot process.

It would be nice to have a CC65 library that is
standard, so RWIII can be accessed easily from
a C or asm program.

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#297

On Friday, May 11, 2012 9:31:56 AM UTC-7, aiia...@gmail.com wrote:

> 
> for instance, where is the quit code???
> 


pg 63, beneath apple Prodos supplement for versions 1.0.1 and 1.0.2


"quit code:  resides in alternate 4k bank ($D000) and is executed at 
$1000"


I'm trying to figure out the entire memory map, at work without an
emulator.

there is main RAM, then AUX RAM.  also LC ROM.

where does this alternate 4K bank of RAM exist at?  in the aux
bank 0?

according to the RWIII manual, :  chapter 7 pg 45

"
The bank select register is mapped into the He’s memory space at location $C073
(49267). The programmer can select one of 48 valid banks by writing the bank number
into this location. (Chapter 6 provides the bank numbers for various memory
configurations.) Once you make the bank selection, soft switches built into the //e
firmware function as they normally would. This allows data transfer from main memory to
auxiliary memory and vice versa.
Data transfers between banks of auxiliary memory must be done in two stages. The
data transfers to main memory first and then from main memory to the desired bank(s).
You can also transfer, one byte at a time, using the Accumulator.
Bank 0 in RamWorks always contains the text information for the 80 column display
and the graphics information for the double high resolution display. This bank must be
active whenever the program updates the display screen"

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#298

On Friday, May 11, 2012 5:42:22 PM UTC-7, aiia...@gmail.com wrote:
> 
> where does this alternate 4K bank of RAM exist at?  in the aux
> bank 0?
> 


from: 

http://vinace.sourceforge.net/en-x187.html

"""""""""""""""""""""""""""
8.3.2. Language Card bus

Reference : Apple IIe Technical Reference Manual pages 79 to 83 (PDF pp113-117)

Language Card bus is in charge of the upper 12K memory. This space was originally dedicated to Basic and Monitor ROM in 48K Apple ][. On 64K Apples, a new possibility was to address RAM in this space. This feature is used to load alternative languages in memory (like ][+ Integer Basic on a //e).

Read and Write can be switched independently. This allows to write into RAM while ROM is visible. It is quite convenient when setting up the RAM as many low level routines are in ROM (text display, keyboard input...).

As there are 16K available RAM but only a 12K slot, the low 4K ($D000-$FFFF) can address two banks of RAM. The high 8K are always connected to the same RAM.

This bus is driven by the Language Card Unit using LCRAM, LCWRITE and LCBNK2 soft switches.

By default (LCRAM is off, LCWRITE off), the ROM is readable and write requests has no effect.

Write requests are forwarded to RAM if LCWRITE is set. If it is not set, write requests have no effect (like for ROM).

Read requests are forwarded to RAM if LCRAM is set and to ROM if it is not set.

High 8K requests ($E000-$FFFF) are connected to highest 8K of RAM ($E000-$FFFF).

Low 4K requests ($D000-$DFFF) are connected to RAM at $D000-$DFFF if LCBNK2 is set or to RAM at $C000-$CFFF if not.

"""""""""""""""""""""""""""



Ok, so there are two 4k RAM areas that can be switched into D000...

is this on the motherboard?  on the 80 column card?

Does each aux bank have it's own alternate 4k area for D000?


Rich

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#299

On Saturday, May 12, 2012 3:31:38 PM UTC-7, aiia...@gmail.com wrote:
> 
> http://vinace.sourceforge.net/en-x187.html
> 
> Low 4K requests ($D000-$DFFF) are connected to RAM at $D000-$DFFF if LCBNK2 is set or to RAM at $C000-$CFFF if not.

> Ok, so there are two 4k RAM areas that can be switched into D000...
> 
> is this on the motherboard?  on the 80 column card?
> 
> Does each aux bank have it's own alternate 4k area for D000?
> 


I see now....

MAIN RAM has two 4k segments it can map to $d000...

the segment which resides at $D000, and the segment
which resides (or ?should?) at $C000.  ROM is mapped
onto the bus when $C000-$CFFF are accessed.  So the
RAM that is "missing" can be switched into $D000.

I was wondering where the missing RAM is.  

It makes sense that each aux bank would do the same,
I'll have to test it.

answered my own question, using the VINACE emulator
documentation..  Ive never seen the information
presented this way.

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#300

On May 12, 4:58 pm, aiiad...@gmail.com wrote:
> On Saturday, May 12, 2012 3:31:38 PM UTC-7, aiia...@gmail.com wrote:
>
> >http://vinace.sourceforge.net/en-x187.html
>
> > Low 4K requests ($D000-$DFFF) are connected to RAM at $D000-$DFFF if LCBNK2 is set or to RAM at $C000-$CFFF if not.
> > Ok, so there are two 4k RAM areas that can be switched into D000...
>
> > is this on the motherboard?  on the 80 column card?
>
> > Does each aux bank have it's own alternate 4k area for D000?
>
> I see now....
>
> MAIN RAM has two 4k segments it can map to $d000...
>
> the segment which resides at $D000, and the segment
> which resides (or ?should?) at $C000.  ROM is mapped
> onto the bus when $C000-$CFFF are accessed.  So the
> RAM that is "missing" can be switched into $D000.
>
> I was wondering where the missing RAM is.
>
> It makes sense that each aux bank would do the same,
> I'll have to test it.
>
> answered my own question, using the VINACE emulator
> documentation..  Ive never seen the information
> presented this way.

.Aux RAM has two jumps for moving and executing programs in Aux RAM.
$C311 and $C314 handle all the work.

Rob

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#301

On Monday, May 21, 2012 8:53:10 PM UTC-7, ict@ccess wrote:
> .Aux RAM has two jumps for moving and executing programs in Aux RAM.
> $C311 and $C314 handle all the work.
> 
> Rob

from David Empson's post in 2001:

(MY NOTE:  This is to access AUX LC from MAIN 48k, one byte to LDa or STa, )

The stub routines to access the auxiliary language card area are as
follows:

RDAUX1   SEI                ; No interrupts!
         LDX C088           ; Read-enable language card bank 1
         STA C009           ; Switch in auxiliary language card, etc.
         LDA xxxx           ; Read target location (patched)
         STA C008           ; Switch in main language card, etc.
         LDX C08A           ; Switch the ROM back in
         CLI                ; Enable interrupts
         RTS

WRAUX1   SEI                ; No interrupts!
         LDX C08B           ; Read/write language card bank 1
         LDX C08B           ; (must access twice)
         STA C009           ; Switch in auxiliary language card, etc.
         STA xxxx           ; Write target location (patched)
         STA C008           ; Switch in main language card, etc.
         LDX C08A           ; Switch the ROM back in
         CLI                ; Enable interrupts
         RTS

RDAUX2   SEI                ; No interrupts!
         LDX C080           ; Read-enable language card bank 2
         STA C009           ; Switch in auxiliary language card, etc.
         LDA xxxx           ; Read target location (patched)
         STA C008           ; Switch in main language card, etc.
         LDX C082           ; Switch the ROM back in
         CLI                ; Enable interrupts
         RTS

WRAUX2   SEI                ; No interrupts!
         LDX C083           ; Read/write language card bank 2
         LDX C083           ; (must access twice)
         STA C009           ; Switch in auxiliary language card, etc.
         STA xxxx           ; Write target location (patched)
         STA C008           ; Switch in main language card, etc.
         LDX C082           ; Switch the ROM back in
         CLI                ; Enable interrupts
         RTS

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