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Groups > comp.sys.acorn.programmer > #1466 > unrolled thread
| Started by | Dave Higton <davehigton@dsl.pipex.com> |
|---|---|
| First post | 2012-03-04 17:34 +0000 |
| Last post | 2012-03-04 21:54 +0000 |
| Articles | 3 — 2 participants |
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Using GCC for embedded projects Dave Higton <davehigton@dsl.pipex.com> - 2012-03-04 17:34 +0000
Re: Using GCC for embedded projects Theo Markettos <theom+news@chiark.greenend.org.uk> - 2012-03-04 17:43 +0000
Re: Using GCC for embedded projects Dave Higton <davehigton@dsl.pipex.com> - 2012-03-04 21:54 +0000
| From | Dave Higton <davehigton@dsl.pipex.com> |
|---|---|
| Date | 2012-03-04 17:34 +0000 |
| Subject | Using GCC for embedded projects |
| Message-ID | <b5e2466b52.davehigton@dsl.pipex.com> |
Is it possible to use RISC OS GCC to generate binaries to run on ARM embedded processors? I've done a few projects using the STR711 chip, but I always used the IAR Embedded Workbench under Windows. More recently I've bought an LPC1114 header board. This is a dead simple little Cortex-M0 chip, Thumb instruction set, with 32 kiB of flash and 8 kiB of RAM. Not a lot of memory management to do, I suspect :-) There are libraries to work the chip's IO subsystems. There is also an assembler file for chip initialisation. However, I'm not clear about a few aspects: 1) Can GCC generate Thumb code? (Presumably with a switch like -march=cortex-m0 or something like that?) 2) Can GCC avoid relying on the shared C library? For example, what code will be generated if arithmetic is done at run-time? 3) How do I specify locations for the various segments? The IAR tools are intended to work under Windows, but also appear to work under Linux and Wine. However, there is currently no cheap way to get the code into the chip from that environment. I had assumed that JTAG works, but no: it has been superseded by SWD. OpenOCD does not (yet?) support the LPC1114 chip. OK, I have written a simple GUI to allow me to communicate with the LPC1114's monitor programme, so I can read and write RAM, erase flash and copy to flash. I can get the chip to execute from my chosen start address. No single-stepping; debugging might be difficult, but OTOH the code is going to be simple. I'm sure there is a way to get the IAR tools to generate a binary file, but it would be nice to build the code using GCC if I can without too much difficulty. Dave
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| From | Theo Markettos <theom+news@chiark.greenend.org.uk> |
|---|---|
| Date | 2012-03-04 17:43 +0000 |
| Message-ID | <Dnl*2Po1t@news.chiark.greenend.org.uk> |
| In reply to | #1466 |
Dave Higton <davehigton@dsl.pipex.com> wrote: > Is it possible to use RISC OS GCC to generate binaries to run on ARM > embedded processors? I can't say for sure, but I've used RISC OS GCC (as a cross compiler on Linux) to compile the Linux kernel for ARM. So the chances are probably good. > 1) Can GCC generate Thumb code? (Presumably with a switch like > -march=cortex-m0 or something like that?) You probably want -mthumb: http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html > 2) Can GCC avoid relying on the shared C library? For example, what > code will be generated if arithmetic is done at run-time? There's an option -nostdinc which doesn't pull in the standard headers. Not sure the position on linking, but there may be a similar option. > 3) How do I specify locations for the various segments? Pass. Find out what the usual options are and see if they work on RISC OS. They may well do. John Tytgat on the GCCSDK list will know for sure. Theo
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| From | Dave Higton <davehigton@dsl.pipex.com> |
|---|---|
| Date | 2012-03-04 21:54 +0000 |
| Message-ID | <e2aa5e6b52.davehigton@dsl.pipex.com> |
| In reply to | #1467 |
In message <Dnl*2Po1t@news.chiark.greenend.org.uk>
Theo Markettos <theom+news@chiark.greenend.org.uk> wrote:
> Dave Higton <davehigton@dsl.pipex.com> wrote:
> > Is it possible to use RISC OS GCC to generate binaries to run on ARM
> > embedded processors?
>
> I can't say for sure, but I've used RISC OS GCC (as a cross compiler on
> Linux) to compile the Linux kernel for ARM. So the chances are probably
> good.
>
> > 1) Can GCC generate Thumb code? (Presumably with a switch like
> > -march=cortex-m0 or something like that?)
>
> You probably want -mthumb:
> http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
>
> > 2) Can GCC avoid relying on the shared C library? For example, what code
> > will be generated if arithmetic is done at run-time?
>
> There's an option -nostdinc which doesn't pull in the standard headers.
> Not sure the position on linking, but there may be a similar option.
>
> > 3) How do I specify locations for the various segments?
>
> Pass. Find out what the usual options are and see if they work on RISC
> OS. They may well do. John Tytgat on the GCCSDK list will know for sure.
OK, thanks, Theo.
Dave
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