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A GnuTLS-Problem - problems fetchin emails using RISC OS

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  A GnuTLS-Problem - problems fetchin emails using RISC OS Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> - 2018-12-16 16:25 +0100
    Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ron <gettingchoppy@gmail.com> - 2018-12-17 11:32 +1300
      Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> - 2018-12-17 00:25 +0100
        Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ron <gettingchoppy@gmail.com> - 2018-12-17 13:25 +1300
          Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> - 2018-12-17 18:45 +0100
            Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ron <gettingchoppy@gmail.com> - 2018-12-18 09:27 +1300
              Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ron <gettingchoppy@gmail.com> - 2018-12-18 12:03 +1300
                Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> - 2018-12-19 18:57 +0100
                  Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ron <gettingchoppy@gmail.com> - 2018-12-20 09:10 +1300
                    Re: A GnuTLS-Problem - problems fetchin emails using RISC OS druck <news@druck.org.uk> - 2018-12-20 08:11 +0000
                  Re: A GnuTLS-Problem - problems fetchin emails using RISC OS news@sprow.co.uk - 2018-12-20 00:00 -0800
                    Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> - 2018-12-20 19:03 +0100
                Re: A GnuTLS-Problem - problems fetchin emails using RISC OS David Higton <dave@davehigton.me.uk> - 2018-12-20 19:52 +0000
                  Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ronald <gettingchoppy@gmail.com> - 2018-12-21 09:58 +1300
                    Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ronald <gettingchoppy@gmail.com> - 2018-12-21 13:28 +1300
                      Re: A GnuTLS-Problem - problems fetchin emails using RISC OS news@sprow.co.uk - 2018-12-21 00:39 -0800
                        Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ronald <gettingchoppy@gmail.com> - 2018-12-21 23:29 +1300
                          Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> - 2018-12-22 04:11 +0100
                            Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ronald <gettingchoppy@gmail.com> - 2018-12-23 00:37 +1300
                  Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> - 2018-12-22 04:16 +0100
                    Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Martin <News03@avisoft.f9.co.uk> - 2018-12-22 11:34 +0000
                    Re: A GnuTLS-Problem - problems fetchin emails using RISC OS David Higton <dave@davehigton.me.uk> - 2018-12-22 17:16 +0000
                      Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ronald <gettingchoppy@gmail.com> - 2018-12-23 09:54 +1300
                        Re: A GnuTLS-Problem - problems fetchin emails using RISC OS David Higton <dave@davehigton.me.uk> - 2018-12-22 21:23 +0000
                          Re: A GnuTLS-Problem - problems fetchin emails using RISC OS David Higton <dave@davehigton.me.uk> - 2018-12-23 20:12 +0000
                        Re: A GnuTLS-Problem - problems fetchin emails using RISC OS druck <news@druck.org.uk> - 2018-12-22 21:59 +0000
                          Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ronald <gettingchoppy@gmail.com> - 2018-12-23 11:50 +1300
                            Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ronald <gettingchoppy@gmail.com> - 2018-12-23 14:35 +1300
                              Re: A GnuTLS-Problem - problems fetchin emails using RISC OS druck <news@druck.org.uk> - 2018-12-23 14:22 +0000
                                Re: A GnuTLS-Problem - problems fetchin emails using RISC OS news@sprow.co.uk - 2018-12-23 12:56 -0800
                            Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Matthew Phillips <spam2011m@yahoo.co.uk> - 2018-12-28 20:28 +0000
                              Re: A GnuTLS-Problem - problems fetchin emails using RISC OS Ronald <gettingchoppy@gmail.com> - 2018-12-29 12:10 +1300

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#5649

On 22 Dec in article <16db306a57.Eclipso@eclipso.at>,
   Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> wrote:
> David Higton <dave@davehigton.me.uk> wrote:

[Snip]

> > What is the reason for trying to build POP3S?  Is it simply to be
> > able to collect email from a server that requires SSL/TLS? 
> > Because if that's all, you could instead use the current build of
> > AntiSpam.

> I wasn't aware about it. Is it this here:
> http://kasoft.com.au/Documentation/AnSpam.html

No - that is a web page linking to a *very* old version. You want

https://aconet.org/antispam/

> > AS doesn't /have/ to delete anything; it can be used simply as a
> > transport.  Recent builds support SSL/TLS using the beta AcornSSL
> > module available from ROOL.

> I cannot find the AcornSSL module. Where can I find it? Is there a
> link anywhere?

See long discussion about it on the ROOL website at
https://www.riscosopen.org/forum/forums/8/topics/11950

Martin

-- 
Martin Avison 
Note that unfortunately this email address will become invalid
without notice if (when) any spam is received. 

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#5651

In message <16db306a57.Eclipso@eclipso.at>
          Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> wrote:

>David Higton <dave@davehigton.me.uk> wrote:
>
>I wasn't aware about it. Is it this here:
>
>http://kasoft.com.au/Documentation/AnSpam.html

No.  (I wasn't even aware of the existence of his variant of what
appears to be a very old version of my old app.)

You need:

https://aconet.org/antispam/

>> AS doesn't /have/ to delete anything; it can be used simply as a
>> transport.  Recent builds support SSL/TLS using the beta AcornSSL
>> module available from ROOL.
>
>I cannot find the AcornSSL module. Where can I find it? Is there a link
>anywhere?

It has been discussed extensively, and is hosted on, the RISC OS
Open web site.  The current link (at time of posting) is:

https://www.riscosopen.org/zipfiles/beta/TCP-IP_Beta5.zip

Dave

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#5652

In message <44b77d6a57.DaveMeUK@my.inbox.com>
          David Higton <dave@davehigton.me.uk> wrote:

> In message <16db306a57.Eclipso@eclipso.at>
>           Alexander Ausserstorfer <alexander.ausserstorfer@eclipso.at> wrote:
> 
> >David Higton <dave@davehigton.me.uk> wrote:
> >
> >I wasn't aware about it. Is it this here:
> >
> >http://kasoft.com.au/Documentation/AnSpam.html
> 
> No.  (I wasn't even aware of the existence of his variant of what
> appears to be a very old version of my old app.)
> 
> You need:
> 
> https://aconet.org/antispam/
> 
> >> AS doesn't /have/ to delete anything; it can be used simply as a
> >> transport.  Recent builds support SSL/TLS using the beta AcornSSL
> >> module available from ROOL.
> >
> >I cannot find the AcornSSL module. Where can I find it? Is there a link
> >anywhere?
> 
> It has been discussed extensively, and is hosted on, the RISC OS
> Open web site.  The current link (at time of posting) is:
> 
> https://www.riscosopen.org/zipfiles/beta/TCP-IP_Beta5.zip
> 
> Dave

I find it odd that it is in 350.Modules, My Network folder has only been
in 310.modules in the past. Does this mean it will not work in older
OS's than RISC OS 3.5?
Ronald

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#5653

In message <5da8916a57.beeb@-.->
          Ronald <gettingchoppy@gmail.com> wrote:

>I find it odd that it is in 350.Modules, My Network folder has only been
>in 310.modules in the past. Does this mean it will not work in older
>OS's than RISC OS 3.5?

Good question.  The discussion is in the "Bounties -> TCP/IP bounty
beta release" thread in the ROOL forum.

But who expects anything earlier than 3.5 to be supported anyway?
I, for one, don't.

Dave

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#5658

In message <9f61946a57.DaveMeUK@my.inbox.com>
          David Higton <dave@davehigton.me.uk> wrote:

>In message <5da8916a57.beeb@-.->
>          Ronald <gettingchoppy@gmail.com> wrote:
>
>>I find it odd that it is in 350.Modules, My Network folder has only been
>>in 310.modules in the past. Does this mean it will not work in older
>>OS's than RISC OS 3.5?
>
>Good question.  The discussion is in the "Bounties -> TCP/IP bounty
>beta release" thread in the ROOL forum.

... where it has been pointed out that the new AcornSSL module uses
Dynamic Areas, which definitely rules out anything earlier than 3.5.

Dave

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#5654

On 22/12/2018 20:54, Ronald wrote:
> I find it odd that it is in 350.Modules, My Network folder has only been
> in 310.modules in the past. Does this mean it will not work in older
> OS's than RISC OS 3.5?
> Ronald

I haven't checked the code with ARMalyser, but its likely it's 32 bit 
neutral code using MRS/MSR instructions, which are only on the ARM6 and 
later, hence RISC OS 3.5 minimum.

You can do 32bit neutral which is also compatible with the ARM2/3, but 
its larger and slower, and more ghastly - and as someone said - largely 
pointless (and yes I know one person is still using an ARM3 A4 laptop).

---druck

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#5655

In message <pvmc4n$5ki$1@dont-email.me>
          druck <news@druck.org.uk> wrote:

> On 22/12/2018 20:54, Ronald wrote:
> > I find it odd that it is in 350.Modules, My Network folder has only been
> > in 310.modules in the past. Does this mean it will not work in older
> > OS's than RISC OS 3.5?
> > Ronald
> 
> I haven't checked the code with ARMalyser, but its likely it's 32 bit 
> neutral code using MRS/MSR instructions, which are only on the ARM6 and 
> later, hence RISC OS 3.5 minimum.
> 
> You can do 32bit neutral which is also compatible with the ARM2/3, but 
> its larger and slower, and more ghastly - and as someone said - largely 
> pointless (and yes I know one person is still using an ARM3 A4 laptop).
> 
> ---druck
> 
I can recall software being released only for RiscPC and newer, probably
the same reason.
Another thing that is not so important, will it require a newer URL or
URI module so that it could work with Phoenix and maybe other browsers?

Ronald

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#5656

In message <1c559c6a57.beeb@-.->
          Ronald <gettingchoppy@gmail.com> wrote:

> In message <pvmc4n$5ki$1@dont-email.me>
>           druck <news@druck.org.uk> wrote:
> 
> > On 22/12/2018 20:54, Ronald wrote:
> > > I find it odd that it is in 350.Modules, My Network folder has only been
> > > in 310.modules in the past. Does this mean it will not work in older
> > > OS's than RISC OS 3.5?
> > > Ronald
> > 
> > I haven't checked the code with ARMalyser, but its likely it's 32 bit 
> > neutral code using MRS/MSR instructions, which are only on the ARM6 and 
> > later, hence RISC OS 3.5 minimum.
> > 
> > You can do 32bit neutral which is also compatible with the ARM2/3, but 
> > its larger and slower, and more ghastly - and as someone said - largely 
> > pointless (and yes I know one person is still using an ARM3 A4 laptop).
> > 
> > ---druck
> > 
> I can recall software being released only for RiscPC and newer, probably
> the same reason.

I might have got the wrong idea about architectures somewhere too,
The Acorn32bitDev pdf states that machines before RiscPC including
A7500 are 26bit only architecture armv2.
RiscPC 610 and newer are armv3and both 26bit and 32bit capable.
The 32bit SharedCLib must play a part too, maybe it wasn't possible on
pre RiscPC, I can't remember.

I read that (generic) gcc v9 has dropped support for armv2 and armv3, no
mention of armv4 but Armv5T 5TE 5TEJ remain supported. At the moment
(gcc 4.7.4) we could possibly target the early architectures and cpu's
additionly using -maps26 if necessary.
I imagine the DDE would have some flexibility for compatibility too.

Ronald

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#5657

On 23/12/2018 01:35, Ronald wrote:
> In message <1c559c6a57.beeb@-.->
>            Ronald <gettingchoppy@gmail.com> wrote:
> 
>> In message <pvmc4n$5ki$1@dont-email.me>
>>            druck <news@druck.org.uk> wrote:
>>> You can do 32bit neutral which is also compatible with the ARM2/3, but
>>> its larger and slower, and more ghastly - and as someone said - largely
>>> pointless (and yes I know one person is still using an ARM3 A4 laptop).
 >
> I might have got the wrong idea about architectures somewhere too,
> The Acorn32bitDev pdf states that machines before RiscPC including
> A7500 are 26bit only architecture armv2.

Archimedes, A3000s, and A5000s using the ARM2, ARM250 or ARM3, are all 
26bit only. All Risc PCs and A7000 using the ARM7500 are both 26bit and 
32bit capable.

> RiscPC 610 and newer are armv3and both 26bit and 32bit capable.

Yes, and that's the point Acorn should have moved to a 32bit OS. All the 
developers were still around, and everything could have been converted 
during the long testing period before the RPC launch.

Another opportunity would have been the introduction of the Strong ARM, 
although the original SA110 supported 26bit mode, it was clear when this 
mode was deleted from the SA1100 a short time later, that there would be 
no more 26bit mode chips.

Both those occasions required new software to take advantage of the new 
hardware or to address incompatibilities, which customers were more than 
willing to purchase. 32bit conversion could have been slipped in, and 
hardly anyone would have even been aware there was an issue.

> The 32bit SharedCLib must play a part too, maybe it wasn't possible on
> pre RiscPC, I can't remember.

The 32bit SCL was available for RISC OS 3.1

Most 32bit software was written to be neutral, so it will run in either 
26bit or 32bit mode, by not relying on the easy flag preserving nature 
of 26bit.

However to work on the ARM2 and ARM3, some extra hoops have to be jumped 
through to cater for the lack of the status register manipulation 
instructions (MSR/MRS) which are on the ARM6 and later. This is why you 
might find software works in 26bit mode, but is RISC OS 3.5 (ARM6) and 
later.

> I read that (generic) gcc v9 has dropped support for armv2 and armv3, no
> mention of armv4 but Armv5T 5TE 5TEJ remain supported. At the moment
> (gcc 4.7.4) we could possibly target the early architectures and cpu's
> additionly using -maps26 if necessary.

I'm not surprised, not only is no one using 26bit mode, but most code 
written for 32bit ARMs doesn't uses the Thumb2 mode (a mix of 16 & 32 
wide instructions), for increased code density. Unlike the very limited 
original 16 bit only Thumb1 instructions, Thumb2 can take full advantage 
of all processors registers and facilities, I don't like it though.

These days the completely different ARMv8 64 bit instruction set is all 
the range. I've just been on a course on the Cortex A53 for Zynq (SOC 
featuring a Xilinx FPGA), and it is very much "it's ARM Jim, but not as 
we know it".

> I imagine the DDE would have some flexibility for compatibility too.

Norcroft CC in DDE still supports ARM2 to XScale, I'm not sure if it 
knows anything later than ARMv5TE.

---druck

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#5659

On Sunday, 23 December 2018 14:22:21 UTC, druck  wrote:
> On 23/12/2018 01:35, Ronald wrote:
> > I imagine the DDE would have some flexibility for compatibility too.
> 
> Norcroft CC in DDE still supports ARM2 to XScale, I'm not sure if it 
> knows anything later than ARMv5TE.

At least a smattering, based on:
* I've seen it emit UXTH and UXTB for narrowing casts which are ARMv6
  (I assume SXTH and SXTB for signed values too but haven't looked that hard).
* The change log for cc 5.74 mentions MLS being used for expressions of the form
    a = b - (c * d) 
  and that's ARMv6T2.
* The change log for cc 5.69 mentions Cortex-A8 scheduling rules, so while that
  might just be the same instructions as before, it's modelling the pipeline 
  in an ARMv7.

Far from complete given the eye watering number of extra instructions that appeared in ARMv6, but compatible with ARMv2 to ARMv8 and shades in between,
Sprow.

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#5660

In message <1c559c6a57.beeb@-.->
 on 22 Dec 2018 Ronald  wrote:

> Another thing that is not so important, will it require a newer URL or URI
> module so that it could work with Phoenix and maybe other browsers?

It does require a new URL module, but not URI.

The updated URL fetcher module and an updated AcornHTTP module have been in
the nightly builds for a few months now: I think they were released in May.

-- 
Matthew Phillips
Durham

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#5661

In message <db55a66d57.Matthew@sinenomine.freeserve.co.uk>
          Matthew Phillips <spam2011m@yahoo.co.uk> wrote:

> In message <1c559c6a57.beeb@-.->
>  on 22 Dec 2018 Ronald  wrote:
> 
> > Another thing that is not so important, will it require a newer URL or URI
> > module so that it could work with Phoenix and maybe other browsers?
> 
> It does require a new URL module, but not URI.
> 
> The updated URL fetcher module and an updated AcornHTTP module have been in
> the nightly builds for a few months now: I think they were released in May.
> 
Thanks, great news, and Phoenix appears to be working flawlessly on https
I logged into riscosopen ,posted and logged out again without issues.

Druck said
> You can do 32bit neutral which is also compatible with the ARM2/3, but
> its larger and slower, and more ghastly - and as someone said - largely
> pointless (and yes I know one person is still using an ARM3 A4 laptop).

Playing with !GCC 4.7.4 a bit and it looks like it is locked to aps-32.
I think it also ignores -march=armv2, the output was an identical size.
!GCC 3.x  can probably do it, It is likely lacking in support for some
functions compared to 4.7.4 and be a bit more work.
Ronald

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