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Here is the events that cause the Store buffer to drain on x86 CPUs

Newsgroups comp.programming
Date 2020-01-20 07:18 -0800
Message-ID <0178f385-23e8-417d-8cd2-98cefbb95fb3@googlegroups.com> (permalink)
Subject Here is the events that cause the Store buffer to drain on x86 CPUs
From aminer68@gmail.com

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Hello,


Here is the events that cause the Store buffer to drain on x86 CPUs, in Section 11.10 of Volume 3 of the Intel SW Developer's Guide, the following list of store-buffer-draining events is included:

- Generation of an Exception and/or Interrupt
- Execution of a serializing instruction (CPUID, IRET, and RSM are the only non-privileged serializing instructions)
- Execution of an I/O instruction
- Execution of a LOCK operation
- Execution of the BINIT operation (an external reset operation using the BINIT pin)
- Execution of an SFENCE instruction
- Execution of an MFENCE instruction

 
So as you are noticing that the LOCK instruction also causes the store buffer to drain, and i am using it in my parallel software projects.


Also read this about the store buffer:

"However under x86-TSO, the stores are cached in the store buffers,
a load consult only shared memory and the store buffer of the given thread, wich means it can load data from memory and ignore values from 
the other thread."

Read more here:

https://books.google.ca/books?id=C2R2DwAAQBAJ&pg=PA127&lpg=PA127&dq=immediately+visible+and+m+fence+and+store+buffer+and+x86&source=bl&ots=yfGI17x1YZ&sig=ACfU3U2EYRawTkQmi3s5wY-sM7IgowDlWg&hl=en&sa=X&ved=2ahUKEwi_nq3duYPkAhVDx1kKHYoyA5UQ6AEwAnoECAgQAQ#v=onepage&q=immediately%20visible%20and%20m%20fence%20and%20store%20buffer%20and%20x86&f=false



Thank you,
Amine Moulay Ramdane.

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Here is the events that cause the Store buffer to drain on x86 CPUs aminer68@gmail.com - 2020-01-20 07:18 -0800

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