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About my scalable MLock and scalable AMLock..

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  About my scalable MLock and scalable AMLock.. Horizon68 <horizon@horizon.com> - 2019-07-15 14:35 -0700

#5100 — About my scalable MLock and scalable AMLock..

Hello..


About my scalable MLock and scalable AMLock..


As i said:

x86 Reordering

All modern x86 chips from Intel and AMD aggressively reorder 
instructions across a window which is around 200 instructions deep on 
recent CPUs from both manufacturers (i.e. a new instruction may execute 
while an older instruction more than 200 instructions "in the past" is 
still waiting). This is generally all invisible to a single thread since 
the CPU still maintains the illusion of serial execution by the current 
thread by respecting dependencies, so from the point of view of the 
current thread of execution it is as-if the instructions were executed 
serially.


Here is my scalable MLock here:

https://sites.google.com/site/scalable68/scalable-mlock


And here is my scalable AMLock here:

https://sites.google.com/site/scalable68/scalable-amlock



I think i will soon enhance more my two scalable lock above and i will 
easily port them to ARM architecture, and now they are working with x86 
architecture, and after that, my SemaMonitor and my SemaCondvar and my 
scalable RWLocks will be ported easily to ARM, and i will soon implement 
a portable Semaphore that uses my SemaCondvar and uses my portable Mutex 
that uses my SemaMonitor, they will soon all work with x86 and ARM.


Thank you,
Amine Moulay Ramdane.

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