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| From | Clemens Ladisch <clemens@ladisch.de> |
| Newsgroups | comp.os.linux.hardware |
| Subject | Re: Assigned interrupts ... what's correct ? |
| Date | Sat, 30 Jun 2012 13:37:04 +0200 |
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Armin wrote: > I have tried to find out what IRQ has been assigned to the devices of > my SuSE/Intel machine ... and I got different infos. There are multiple ways of routing and handling interrupts, with various degrees of backwards compatibility. In the good^Wbad ol' times of the ISA bus, the interrupt controller (the PIC) was able to handle 16 interrupts, numbered 0 to 15. Modern interrupt controllers are still compatible with that, and the BIOS must initialize interrupts to use that because it doesn't know if the OS is able to use anything else. All PCI devices have an interrupt number register, which does not affect the device itself but is just used by the BIOS or the OS to tell the driver to which interrupt the chip's interrupt pin is routed. This register is what is shown by lspci -H1: > lspci -vvv -H1 > 02:00.0 Ethernet controller: Atheros Communications L2 Fast Ethernet (rev a0) > Interrupt: pin A routed to IRQ 10 <======= This is the ISA interrupt that was set by the BIOS. Most ISA interrupts are reserved for certain ISA devices, so you often end up with all PCI devices sharing only one or two interrupts. Therefore, a better interrupt controller was introduced, the IOAPIC. Typically, it has eight additional interrupts lines (16-23) for PCI devices. When a driver attaches to a PCI device, the kernel automatically configures the interrupt to be routed through the IOAPIC, if possible. This is what you see in the kernel log: > dmesg | grep IRQ > atl2 0000:02:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17 <======== There is still the problem that with eight interrupt lines, modern PCs still have many shared PCI interrupts. So PCI Express has a new interrupt delivery mechanism (MSI) that does not require interrupt lines at all and allows arbitrarily many interrupts. MSIs behave not exactly the same as old-style PCI interrupts, so the kernel cannot enable them automatically but does so only when a driver requests it. You can see this happen with "dmesg | grep -i IRQ", or by using lspci without -H which shows the kernel-internal data structure: > lspci -vvv > 02:00.0 Ethernet controller: Atheros Communications L2 Fast Ethernet (rev a0) > Interrupt: pin A routed to IRQ 43 <======= This is also shown in /proc/interrupts. To answer your question "what's correct?" -- all of them are, at different times. :-) Regards, Clemens
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Assigned interrupts ... what's correct ? Armin <a-steinhoff@web.de> - 2012-06-30 12:42 +0200 Re: Assigned interrupts ... what's correct ? Armin <a-steinhoff@web.de> - 2012-06-30 13:12 +0200 Re: Assigned interrupts ... what's correct ? Clemens Ladisch <clemens@ladisch.de> - 2012-06-30 13:37 +0200
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