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Re: Intel VISA

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Initially I thought this is like shipping a large software product with all 
the debug code left in.  In a software product there is usually something
like a compile-time option to exclude most of the debug code using conditional 
compilation; you don't ship a lot of unnecessary debug code in the product.
And leaving the debug on in a chip will have the undesirable consequence of
using up die surface area... which is something you don't want to do when
you're trying to minimise die size and maximise yield.

But then I read the sentance that says this helps debugging on the 
manufacturing line, so maybe this is actually used during chip 
production.  I guess if the chips coming off the line fail some tests, or
you want to tune the layout to get (say) better yield at higher frequencies,
you need a way to test and debug them.  So it might not so easy to switch off 
the debug in hardware as it is in software.  In fact having the debug
infrastructure in place may be essential to fix bugs in the chip as they
are found in the field.  If this is correct, I would expect AMD and 
ARM to have similar technology for production debug and test.

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Intel VISA RS Wood  <rsw@therandymon.com> - 2019-03-30 17:08 -0400
  Re: Intel VISA Oregonian Haruspex <no_email@invalid.invalid> - 2019-04-10 06:10 +0000
  Re: Intel VISA Steve555 <Steve555@reallybogus.nodomain.nowhere.invalid> - 2019-06-17 22:05 +0000

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