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Groups > comp.lang.prolog > #15628 > unrolled thread
| Started by | Mild Shock <janburse@fastmail.fm> |
|---|---|
| First post | 2026-07-13 07:25 +0200 |
| Last post | 2026-07-16 23:09 +0200 |
| Articles | 11 — 1 participant |
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Creating a "European CMOS 2.0 Army" Mild Shock <janburse@fastmail.fm> - 2026-07-13 07:25 +0200
Micro penis walking around with a rucksack (Was: Creating a "European CMOS 2.0 Army") Mild Shock <janburse@fastmail.fm> - 2026-07-13 07:27 +0200
Light Tuning of LLMs Locally (Was: Micro penis walking around with a rucksack) Mild Shock <janburse@fastmail.fm> - 2026-07-13 13:27 +0200
Light Tuning of LLMs Locally (Was: Micro penis walking around with a rucksack) Mild Shock <janburse@fastmail.fm> - 2026-07-13 13:28 +0200
PCIe 6.0 x16 versus LPDDR5X-8000 latency (Re: Light Tuning of LLMs Locally) Mild Shock <janburse@fastmail.fm> - 2026-07-13 15:56 +0200
TSMC's 2nm (N2) node and the 7 GHz target (Re: Creating a "European CMOS 2.0 Army") Mild Shock <janburse@fastmail.fm> - 2026-07-14 14:12 +0200
pi-WAM is just like Laika3, the first Dog on Mars (Was: TSMC's 2nm (N2) node and the 7 GHz target) Mild Shock <janburse@fastmail.fm> - 2026-07-15 18:10 +0200
So memory bandwidth is no issue at all (Re: pi-WAM is just like Laika3, the first Dog on Mars) Mild Shock <janburse@fastmail.fm> - 2026-07-15 18:37 +0200
For iGPU which acts as a APU RAM is shared (Re: So memory bandwidth is no issue at all) Mild Shock <janburse@fastmail.fm> - 2026-07-16 17:09 +0200
Village Idiot wants 8088 back [Puting Troll] (Re: For iGPU which acts as a APU RAM is shared) Mild Shock <janburse@fastmail.fm> - 2026-07-16 23:03 +0200
VT100 25 x 80 terminal = 2000 Bytes (Re: Village Idiot wants 8088 back [Puting Troll]) Mild Shock <janburse@fastmail.fm> - 2026-07-16 23:09 +0200
| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-13 07:25 +0200 |
| Subject | Creating a "European CMOS 2.0 Army" |
| Message-ID | <1131srm$tqe$1@solani.org> |
Hi, For marketing purposes people typically look at the race towards 2nm, and we find: A month ago, Apple lost its exclusivity on 3 nm smartphone processors with MediaTek’s Dimensity 9400 chip, integrated in the Vivo X200 Pro smartphone. Qualcomm is also in the race with its recently unveiled Snapdragon 8 Elite and set to power the Xiaomi 15 Pro in 2025. However, Apple should regain its position as innovation leader in 2026 with the release of the iPhone 18, which should feature the A20 chip built on TSMC’s 2 nm process." But there is a vertical vias revolution going on as well, some SOCs typically being at 18 layers now: Zooming Into a CPU (It's Incredible) https://www.youtube.com/watch?v=Bez-2cvYja0 imec has coined the term CMOS 2.0: LEUVEN (Belgium), MARCH 12th, 2026 — Imec, a world-leading research and innovation hub in advanced semiconductor technologies, has launched a first-of-its-kind consortium with 26 European university groups that will jointly work on the technology roadmap beyond CMOS scaling (CMOS 2.0). https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips So we might see more mobile grade GPUs. Bye
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| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-13 07:27 +0200 |
| Subject | Micro penis walking around with a rucksack (Was: Creating a "European CMOS 2.0 Army") |
| Message-ID | <1131t0l$tqe$2@solani.org> |
| In reply to | #15628 |
Hi, So we might see more mobile grade GPUs, on a finger nail, without any cooling fans in the future? Yes my Redmi smart phone doesn't have any cooling fans, I do not intend to put a RTX 5090 in a rucksack and carry a 600 W battery pack (*), to have some AI on my phone. Have Fun! Bye (*) The Bluetti Premium 30 V2 is 4.3 Kg heavy: https://www.galaxus.ch/de/s4/product/bluetti-premium-30-v2-320-wh-430-kg-power-station-65489839 Mirco penis was loosing his marbles: > you stinking sack of rocks, you can't read your > own redundant links. Watch the prices for the > Ryzen AI laptops. Fucking idiot. Not worth the > price for what they give in AI. Those are embedded > cpu/gpu cretin, you don't need to read more. Mild Shock schrieb: > Hi, > > For marketing purposes people > typically look at the race towards > 2nm, and we find: > > A month ago, Apple lost its exclusivity > on 3 nm smartphone processors with > MediaTek’s Dimensity 9400 chip, integrated > in the Vivo X200 Pro smartphone. Qualcomm > is also in the race with its recently > unveiled Snapdragon 8 Elite and set to > power the Xiaomi 15 Pro in 2025. However, > Apple should regain its position as innovation > leader in 2026 with the release of the > iPhone 18, which should feature the A20 > chip built on TSMC’s 2 nm process." > > But there is a vertical vias revolution > going on as well, some SOCs typically > being at 18 layers now: > > Zooming Into a CPU (It's Incredible) > https://www.youtube.com/watch?v=Bez-2cvYja0 > > imec has coined the term CMOS 2.0: > > LEUVEN (Belgium), MARCH 12th, 2026 — Imec, > a world-leading research and innovation hub > in advanced semiconductor technologies, has > launched a first-of-its-kind consortium with > 26 European university groups that will jointly > work on the technology roadmap beyond > CMOS scaling (CMOS 2.0). > https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips > > > So we might see more mobile grade GPUs. > > Bye
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| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-13 13:27 +0200 |
| Subject | Light Tuning of LLMs Locally (Was: Micro penis walking around with a rucksack) |
| Message-ID | <1132i3r$1che$1@solani.org> |
| In reply to | #15629 |
Hi, Interestingly "Strix" (Strix Point) is no longer the top news, as "Krackan" (Krackan Point) and the massive "Halo" (Strix Halo) have officially stepped into the spotlight. My tester Acer Swift Go was already "Krackan" (Krackan Point. So a shift from local inferencing, to limited local machine learning is possible. And AMD Ryzen is hitting the drums: AMD Ryzen™ AI Halo: Build the AI You Want. Your Stack. Your Rules. https://www.youtube.com/watch?v=lxTaJ5LDY20 Pre-orders for the platform open in June, featuring 128GB of unified memory which enables developers to run intensive workloads with models up to 200 billion parameters. LoL Have Fun! Bye Mild Shock schrieb: > Hi, > > So we might see more mobile grade GPUs, > on a finger nail, without any cooling fans > in the future? Yes my Redmi smart phone doesn't > > have any cooling fans, I do not intend to put > a RTX 5090 in a rucksack and carry a 600 W battery > pack (*), to have some AI on my phone. > > Have Fun! > > Bye > > (*) The Bluetti Premium 30 V2 is 4.3 Kg heavy: > https://www.galaxus.ch/de/s4/product/bluetti-premium-30-v2-320-wh-430-kg-power-station-65489839 > > > Mirco penis was loosing his marbles: >> you stinking sack of rocks, you can't read your own redundant links. >> Watch the prices for the > > Ryzen AI laptops. Fucking idiot. Not worth the > > price for what they give in AI. Those are embedded > > cpu/gpu cretin, you don't need to read more. > > Mild Shock schrieb: >> Hi, >> >> For marketing purposes people >> typically look at the race towards >> 2nm, and we find: >> >> A month ago, Apple lost its exclusivity >> on 3 nm smartphone processors with >> MediaTek’s Dimensity 9400 chip, integrated >> in the Vivo X200 Pro smartphone. Qualcomm >> is also in the race with its recently >> unveiled Snapdragon 8 Elite and set to >> power the Xiaomi 15 Pro in 2025. However, >> Apple should regain its position as innovation >> leader in 2026 with the release of the >> iPhone 18, which should feature the A20 >> chip built on TSMC’s 2 nm process." >> >> But there is a vertical vias revolution >> going on as well, some SOCs typically >> being at 18 layers now: >> >> Zooming Into a CPU (It's Incredible) >> https://www.youtube.com/watch?v=Bez-2cvYja0 >> >> imec has coined the term CMOS 2.0: >> >> LEUVEN (Belgium), MARCH 12th, 2026 — Imec, >> a world-leading research and innovation hub >> in advanced semiconductor technologies, has >> launched a first-of-its-kind consortium with >> 26 European university groups that will jointly >> work on the technology roadmap beyond >> CMOS scaling (CMOS 2.0). >> https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips >> >> >> So we might see more mobile grade GPUs. >> >> Bye >
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| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-13 13:28 +0200 |
| Subject | Light Tuning of LLMs Locally (Was: Micro penis walking around with a rucksack) |
| Message-ID | <1132i5e$1che$2@solani.org> |
| In reply to | #15629 |
Hi, Interestingly "Strix" (Strix Point) is no longer the top news, as "Krackan" (Krackan Point) and the massive "Halo" (Strix Halo) have officially stepped into the spotlight. The New AMD Ryzen Ai Halo Mini PC Has The Most Powerful iGPU! https://www.youtube.com/watch?v=AZpCPX_EJPg My tester Acer Swift Go was already "Krackan" (Krackan Point. So a shift from local inferencing, to limited local machine learning is possible. And AMD Ryzen is hitting the drums: AMD Ryzen™ AI Halo: Build the AI You Want. Your Stack. Your Rules. https://www.youtube.com/watch?v=lxTaJ5LDY20 Pre-orders for the platform open in June, featuring 128GB of unified memory which enables developers to run intensive workloads with models up to 200 billion parameters. LoL Have Fun! Bye Mild Shock schrieb: > Hi, > > So we might see more mobile grade GPUs, > on a finger nail, without any cooling fans > in the future? Yes my Redmi smart phone doesn't > > have any cooling fans, I do not intend to put > a RTX 5090 in a rucksack and carry a 600 W battery > pack (*), to have some AI on my phone. > > Have Fun! > > Bye > > (*) The Bluetti Premium 30 V2 is 4.3 Kg heavy: > https://www.galaxus.ch/de/s4/product/bluetti-premium-30-v2-320-wh-430-kg-power-station-65489839 > > > Mirco penis was loosing his marbles: >> you stinking sack of rocks, you can't read your own redundant links. >> Watch the prices for the > > Ryzen AI laptops. Fucking idiot. Not worth the > > price for what they give in AI. Those are embedded > > cpu/gpu cretin, you don't need to read more. > > Mild Shock schrieb: >> Hi, >> >> For marketing purposes people >> typically look at the race towards >> 2nm, and we find: >> >> A month ago, Apple lost its exclusivity >> on 3 nm smartphone processors with >> MediaTek’s Dimensity 9400 chip, integrated >> in the Vivo X200 Pro smartphone. Qualcomm >> is also in the race with its recently >> unveiled Snapdragon 8 Elite and set to >> power the Xiaomi 15 Pro in 2025. However, >> Apple should regain its position as innovation >> leader in 2026 with the release of the >> iPhone 18, which should feature the A20 >> chip built on TSMC’s 2 nm process." >> >> But there is a vertical vias revolution >> going on as well, some SOCs typically >> being at 18 layers now: >> >> Zooming Into a CPU (It's Incredible) >> https://www.youtube.com/watch?v=Bez-2cvYja0 >> >> imec has coined the term CMOS 2.0: >> >> LEUVEN (Belgium), MARCH 12th, 2026 — Imec, >> a world-leading research and innovation hub >> in advanced semiconductor technologies, has >> launched a first-of-its-kind consortium with >> 26 European university groups that will jointly >> work on the technology roadmap beyond >> CMOS scaling (CMOS 2.0). >> https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips >> >> >> So we might see more mobile grade GPUs. >> >> Bye >
[toc] | [prev] | [next] | [standalone]
| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-13 15:56 +0200 |
| Subject | PCIe 6.0 x16 versus LPDDR5X-8000 latency (Re: Light Tuning of LLMs Locally) |
| Message-ID | <1132qpu$1iei$3@solani.org> |
| In reply to | #15632 |
Hi, Its amazing how Micro Penis slumps in his own turf, when he argues against iGPU via nonsense like: > to the embedded gpu, blocked by the speed of the cpu Facts are that dual channel RAM has some advantage over PCIe x16. Take for example latency: Latency Comparison Data Pathway Approximate Latency Why It Matters iGPU to LPDDR5X-8000 ~30 to 50 ns Direct on-die access. The iGPU accesses the system RAM directly through the CPU's internal fabric, bypassing the PCIe bus completely. GPU over PCIe 6.0 x4 Link ~80 to 100 ns Bus transition penalty. This is just the time it takes for a packet to leave the GPU chip, travel down 4 traces, and reach the system controller. For PCIe 6.0 x16 latency is a little lower, but still higher than LPDDR5X-8000. Bye Mild Shock schrieb: > Hi, > > Interestingly "Strix" (Strix Point) is no longer > the top news, as "Krackan" (Krackan Point) and the > massive "Halo" (Strix Halo) have officially stepped > into the spotlight. > > The New AMD Ryzen Ai Halo Mini PC Has The Most Powerful iGPU! > https://www.youtube.com/watch?v=AZpCPX_EJPg > > My tester Acer Swift Go was already "Krackan" (Krackan > Point. So a shift from local inferencing, to limited > local machine learning is possible. And AMD > Ryzen is hitting the drums: > > AMD Ryzen™ AI Halo: Build the AI You Want. Your Stack. Your Rules. > https://www.youtube.com/watch?v=lxTaJ5LDY20 > > Pre-orders for the platform open in June, featuring > 128GB of unified memory which enables developers to > run intensive workloads with models up to 200 > billion parameters. > > LoL > > Have Fun! > > Bye > > Mild Shock schrieb: >> Hi, >> >> So we might see more mobile grade GPUs, >> on a finger nail, without any cooling fans >> in the future? Yes my Redmi smart phone doesn't >> >> have any cooling fans, I do not intend to put >> a RTX 5090 in a rucksack and carry a 600 W battery >> pack (*), to have some AI on my phone. >> >> Have Fun! >> >> Bye >> >> (*) The Bluetti Premium 30 V2 is 4.3 Kg heavy: >> https://www.galaxus.ch/de/s4/product/bluetti-premium-30-v2-320-wh-430-kg-power-station-65489839 >> >> >> Mirco penis was loosing his marbles: >>> you stinking sack of rocks, you can't read your own redundant links. >>> Watch the prices for the >> > Ryzen AI laptops. Fucking idiot. Not worth the >> > price for what they give in AI. Those are embedded >> > cpu/gpu cretin, you don't need to read more. >> >> Mild Shock schrieb: >>> Hi, >>> >>> For marketing purposes people >>> typically look at the race towards >>> 2nm, and we find: >>> >>> A month ago, Apple lost its exclusivity >>> on 3 nm smartphone processors with >>> MediaTek’s Dimensity 9400 chip, integrated >>> in the Vivo X200 Pro smartphone. Qualcomm >>> is also in the race with its recently >>> unveiled Snapdragon 8 Elite and set to >>> power the Xiaomi 15 Pro in 2025. However, >>> Apple should regain its position as innovation >>> leader in 2026 with the release of the >>> iPhone 18, which should feature the A20 >>> chip built on TSMC’s 2 nm process." >>> >>> But there is a vertical vias revolution >>> going on as well, some SOCs typically >>> being at 18 layers now: >>> >>> Zooming Into a CPU (It's Incredible) >>> https://www.youtube.com/watch?v=Bez-2cvYja0 >>> >>> imec has coined the term CMOS 2.0: >>> >>> LEUVEN (Belgium), MARCH 12th, 2026 — Imec, >>> a world-leading research and innovation hub >>> in advanced semiconductor technologies, has >>> launched a first-of-its-kind consortium with >>> 26 European university groups that will jointly >>> work on the technology roadmap beyond >>> CMOS scaling (CMOS 2.0). >>> https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips >>> >>> >>> So we might see more mobile grade GPUs. >>> >>> Bye >> >
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| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-14 14:12 +0200 |
| Subject | TSMC's 2nm (N2) node and the 7 GHz target (Re: Creating a "European CMOS 2.0 Army") |
| Message-ID | <113593j$35be$2@solani.org> |
| In reply to | #15628 |
Hi, TSMC's 2nm (N2) node and the 7 GHz target represent a monumental milestone in silicon manufacturing, shifting away from legacy FinFETs to advanced Gate-All-Around (GAA) nanosheet transistors. This evolution allows chip designers—particularly in the PC and AI sectors—to push processor clock speeds previously thought impossible on standard nodes AMD confirms Zen 6 rollout for its July 22 AI event https://videocardz.com/newz/amd-confirms-zen-6-launches-in-less-than-two-weeks-starting-with-epyc-venice Production of the 6th Gen EPYC family is already ramping up. AMD says Venice is its first high-performance computing product manufactured using TSMC’s 2nm process technology. Bye Mild Shock schrieb: > Hi, > > For marketing purposes people > typically look at the race towards > 2nm, and we find: > > A month ago, Apple lost its exclusivity > on 3 nm smartphone processors with > MediaTek’s Dimensity 9400 chip, integrated > in the Vivo X200 Pro smartphone. Qualcomm > is also in the race with its recently > unveiled Snapdragon 8 Elite and set to > power the Xiaomi 15 Pro in 2025. However, > Apple should regain its position as innovation > leader in 2026 with the release of the > iPhone 18, which should feature the A20 > chip built on TSMC’s 2 nm process." > > But there is a vertical vias revolution > going on as well, some SOCs typically > being at 18 layers now: > > Zooming Into a CPU (It's Incredible) > https://www.youtube.com/watch?v=Bez-2cvYja0 > > imec has coined the term CMOS 2.0: > > LEUVEN (Belgium), MARCH 12th, 2026 — Imec, > a world-leading research and innovation hub > in advanced semiconductor technologies, has > launched a first-of-its-kind consortium with > 26 European university groups that will jointly > work on the technology roadmap beyond > CMOS scaling (CMOS 2.0). > https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips > > > So we might see more mobile grade GPUs. > > Bye
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| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-15 18:10 +0200 |
| Subject | pi-WAM is just like Laika3, the first Dog on Mars (Was: TSMC's 2nm (N2) node and the 7 GHz target) |
| Message-ID | <1138bco$58mb$2@solani.org> |
| In reply to | #15635 |
Hi, We recently implemented a parallel π-WAM on a GPU backend and could demonstrate an estimated 11.4 Giga Lips. In this post we report a further experiment, this time presenting a parallel π-WAM on a CPU backend, that can lift specialized Prolog, currently to 1.7 Giga Lips performance. Having an excess number of threads is a bad idea. What if we do context switching on our own? With this approach we could bring down the execution time of 128 Hack VMs by 33%. We estimate for the test which had 11.4 GLips on the GPU, that we reach 1.7 GLips on the CPU. Bye See also: Parallel π-WAM: 1.7 Giga Lips on a CPU https://medium.com/2989/8a984e75af44 Mild Shock schrieb: > Hi, > > TSMC's 2nm (N2) node and the 7 GHz target > represent a monumental milestone in silicon > manufacturing, shifting away from legacy > FinFETs to advanced Gate-All-Around (GAA) > nanosheet transistors. > > This evolution allows chip designers—particularly > in the PC and AI sectors—to push processor > clock speeds previously thought impossible > on standard nodes > > AMD confirms Zen 6 rollout for its July 22 AI event > https://videocardz.com/newz/amd-confirms-zen-6-launches-in-less-than-two-weeks-starting-with-epyc-venice > > > Production of the 6th Gen EPYC family is > already ramping up. AMD says Venice is its > first high-performance computing product > manufactured using TSMC’s 2nm process > technology. > > Bye > > Mild Shock schrieb: >> Hi, >> >> For marketing purposes people >> typically look at the race towards >> 2nm, and we find: >> >> A month ago, Apple lost its exclusivity >> on 3 nm smartphone processors with >> MediaTek’s Dimensity 9400 chip, integrated >> in the Vivo X200 Pro smartphone. Qualcomm >> is also in the race with its recently >> unveiled Snapdragon 8 Elite and set to >> power the Xiaomi 15 Pro in 2025. However, >> Apple should regain its position as innovation >> leader in 2026 with the release of the >> iPhone 18, which should feature the A20 >> chip built on TSMC’s 2 nm process." >> >> But there is a vertical vias revolution >> going on as well, some SOCs typically >> being at 18 layers now: >> >> Zooming Into a CPU (It's Incredible) >> https://www.youtube.com/watch?v=Bez-2cvYja0 >> >> imec has coined the term CMOS 2.0: >> >> LEUVEN (Belgium), MARCH 12th, 2026 — Imec, >> a world-leading research and innovation hub >> in advanced semiconductor technologies, has >> launched a first-of-its-kind consortium with >> 26 European university groups that will jointly >> work on the technology roadmap beyond >> CMOS scaling (CMOS 2.0). >> https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips >> >> >> So we might see more mobile grade GPUs. >> >> Bye >
[toc] | [prev] | [next] | [standalone]
| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-15 18:37 +0200 |
| Subject | So memory bandwidth is no issue at all (Re: pi-WAM is just like Laika3, the first Dog on Mars) |
| Message-ID | <1138d06$59mb$2@solani.org> |
| In reply to | #15637 |
Hi, So memory bandwidth is no issue at all for this kind of backtracking problem. Its all about arithmetic bandwidth . And since I am not using vectors or matrices, it is still poor. You can do the math. The CPU has 16 logical cores (8 physical with hyperthreading). The GPU single-threaded is around 5 times slower than the CPU single threaded, but their number is greater. Now you can do the math as follows: 16 * 11.4 / 1.7 * 5 = 536.47 Pretty much the number of shader cores (*), i.e. 512, that the Ryzen AI 7 350 laptop offers in its integrated GPU Radeon 860M. LoL Bye (*) Unified shading units (also referred to as unified shaders, shader cores, or stream processors) are flexible processing components inside a graphics processing unit (GPU) that can handle any type of rendering or compute task. Mild Shock schrieb: > Hi, > > We recently implemented a parallel π-WAM > on a GPU backend and could demonstrate an > estimated 11.4 Giga Lips. In this post we > report a further experiment, this time > presenting a parallel π-WAM on a CPU backend, > that can lift specialized Prolog, currently > to 1.7 Giga Lips performance. > > Having an excess number of threads is a > bad idea. What if we do context switching > on our own? With this approach we could > bring down the execution time of 128 Hack > VMs by 33%. We estimate for the test which > had 11.4 GLips on the GPU, that we reach > 1.7 GLips on the CPU. > > Bye > > See also: > > Parallel π-WAM: 1.7 Giga Lips on a CPU > https://medium.com/2989/8a984e75af44 > > Mild Shock schrieb: >> Hi, >> >> TSMC's 2nm (N2) node and the 7 GHz target >> represent a monumental milestone in silicon >> manufacturing, shifting away from legacy >> FinFETs to advanced Gate-All-Around (GAA) >> nanosheet transistors. >> >> This evolution allows chip designers—particularly >> in the PC and AI sectors—to push processor >> clock speeds previously thought impossible >> on standard nodes >> >> AMD confirms Zen 6 rollout for its July 22 AI event >> https://videocardz.com/newz/amd-confirms-zen-6-launches-in-less-than-two-weeks-starting-with-epyc-venice >> >> >> Production of the 6th Gen EPYC family is >> already ramping up. AMD says Venice is its >> first high-performance computing product >> manufactured using TSMC’s 2nm process >> technology. >> >> Bye >> >> Mild Shock schrieb: >>> Hi, >>> >>> For marketing purposes people >>> typically look at the race towards >>> 2nm, and we find: >>> >>> A month ago, Apple lost its exclusivity >>> on 3 nm smartphone processors with >>> MediaTek’s Dimensity 9400 chip, integrated >>> in the Vivo X200 Pro smartphone. Qualcomm >>> is also in the race with its recently >>> unveiled Snapdragon 8 Elite and set to >>> power the Xiaomi 15 Pro in 2025. However, >>> Apple should regain its position as innovation >>> leader in 2026 with the release of the >>> iPhone 18, which should feature the A20 >>> chip built on TSMC’s 2 nm process." >>> >>> But there is a vertical vias revolution >>> going on as well, some SOCs typically >>> being at 18 layers now: >>> >>> Zooming Into a CPU (It's Incredible) >>> https://www.youtube.com/watch?v=Bez-2cvYja0 >>> >>> imec has coined the term CMOS 2.0: >>> >>> LEUVEN (Belgium), MARCH 12th, 2026 — Imec, >>> a world-leading research and innovation hub >>> in advanced semiconductor technologies, has >>> launched a first-of-its-kind consortium with >>> 26 European university groups that will jointly >>> work on the technology roadmap beyond >>> CMOS scaling (CMOS 2.0). >>> https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips >>> >>> >>> So we might see more mobile grade GPUs. >>> >>> Bye >> >
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| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-16 17:09 +0200 |
| Subject | For iGPU which acts as a APU RAM is shared (Re: So memory bandwidth is no issue at all) |
| Message-ID | <113as6d$6t7t$2@solani.org> |
| In reply to | #15638 |
Hi, For iGPU which acts as a APU RAM is shared, an integrated GPU (iGPU) used as an APU relies entirely on shared system RAM. Because the processor and graphics chip live on the same silicon die, they do not have their own separate video memory (like discrete GPUs do with dedicated VRAM). Instead, the iGPU carves out a portion of your regular system memory to store textures, frame buffers, and other graphics data. While AMD originally coined Accelerated Processing Unit (APU) in 2011 to highlight the fusion of CPU and GPU on a single die, modern AI computing has redefined what it means to "accelerate" data. When Intel and Apple discuss their latest processors, they frequently highlight dedicated hardware blocks called NPUs (Neural Processing Units) or Neural Engines right alongside the CPU and GPU. https://www.articsledge.com/post/accelerated-processing-unit-apu Bye Mild Shock schrieb: > Hi, > > So memory bandwidth is no issue at all for > this kind of backtracking problem. Its all > about arithmetic bandwidth . And since I am > > not using vectors or matrices, it is still > poor. You can do the math. The CPU has 16 > logical cores (8 physical with hyperthreading). > > The GPU single-threaded is around 5 times > slower than the CPU single threaded, but > their number is greater. Now you can do > > the math as follows: > > 16 * 11.4 / 1.7 * 5 = 536.47 > > Pretty much the number of shader cores (*), > i.e. 512, that the Ryzen AI 7 350 laptop > offers in its integrated GPU Radeon 860M. > > LoL > > Bye > > (*) Unified shading units (also referred to > as unified shaders, shader cores, or stream > processors) are flexible processing components > > inside a graphics processing unit (GPU) that > can handle any type of rendering or compute task. > > Mild Shock schrieb: >> Hi, >> >> We recently implemented a parallel π-WAM >> on a GPU backend and could demonstrate an >> estimated 11.4 Giga Lips. In this post we >> report a further experiment, this time >> presenting a parallel π-WAM on a CPU backend, >> that can lift specialized Prolog, currently >> to 1.7 Giga Lips performance. >> >> Having an excess number of threads is a >> bad idea. What if we do context switching >> on our own? With this approach we could >> bring down the execution time of 128 Hack >> VMs by 33%. We estimate for the test which >> had 11.4 GLips on the GPU, that we reach >> 1.7 GLips on the CPU. >> >> Bye >> >> See also: >> >> Parallel π-WAM: 1.7 Giga Lips on a CPU >> https://medium.com/2989/8a984e75af44 >> >> Mild Shock schrieb: >>> Hi, >>> >>> TSMC's 2nm (N2) node and the 7 GHz target >>> represent a monumental milestone in silicon >>> manufacturing, shifting away from legacy >>> FinFETs to advanced Gate-All-Around (GAA) >>> nanosheet transistors. >>> >>> This evolution allows chip designers—particularly >>> in the PC and AI sectors—to push processor >>> clock speeds previously thought impossible >>> on standard nodes >>> >>> AMD confirms Zen 6 rollout for its July 22 AI event >>> https://videocardz.com/newz/amd-confirms-zen-6-launches-in-less-than-two-weeks-starting-with-epyc-venice >>> >>> >>> Production of the 6th Gen EPYC family is >>> already ramping up. AMD says Venice is its >>> first high-performance computing product >>> manufactured using TSMC’s 2nm process >>> technology. >>> >>> Bye >>> >>> Mild Shock schrieb: >>>> Hi, >>>> >>>> For marketing purposes people >>>> typically look at the race towards >>>> 2nm, and we find: >>>> >>>> A month ago, Apple lost its exclusivity >>>> on 3 nm smartphone processors with >>>> MediaTek’s Dimensity 9400 chip, integrated >>>> in the Vivo X200 Pro smartphone. Qualcomm >>>> is also in the race with its recently >>>> unveiled Snapdragon 8 Elite and set to >>>> power the Xiaomi 15 Pro in 2025. However, >>>> Apple should regain its position as innovation >>>> leader in 2026 with the release of the >>>> iPhone 18, which should feature the A20 >>>> chip built on TSMC’s 2 nm process." >>>> >>>> But there is a vertical vias revolution >>>> going on as well, some SOCs typically >>>> being at 18 layers now: >>>> >>>> Zooming Into a CPU (It's Incredible) >>>> https://www.youtube.com/watch?v=Bez-2cvYja0 >>>> >>>> imec has coined the term CMOS 2.0: >>>> >>>> LEUVEN (Belgium), MARCH 12th, 2026 — Imec, >>>> a world-leading research and innovation hub >>>> in advanced semiconductor technologies, has >>>> launched a first-of-its-kind consortium with >>>> 26 European university groups that will jointly >>>> work on the technology roadmap beyond >>>> CMOS scaling (CMOS 2.0). >>>> https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips >>>> >>>> >>>> So we might see more mobile grade GPUs. >>>> >>>> Bye >>> >> >
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| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-16 23:03 +0200 |
| Subject | Village Idiot wants 8088 back [Puting Troll] (Re: For iGPU which acts as a APU RAM is shared) |
| Message-ID | <113bgv8$7ct5$2@solani.org> |
| In reply to | #15640 |
Hi, Ha Ha, Village Idiot is Pissed and wants his Intel 8088 back. There you have boards with VRAM = 1k Byte. Well it fits you, since you are a putin payed troll. Typically russian or belarus 9000 level stupid. Bye Bobauk Modenov schrieb: > Mild Shock wrote: > >> an integrated GPU (iGPU) used as an APU relies entirely on shared system >> RAM. Because the processor and graphics chip live on the same silicon >> die, they do not have their own separate video memory > > idiot, yet another thing you dont undrestand, only max half of the entire > ram can be given to the gpu. Most of the laptops gives even less, say max > 1 GB of the "shared" ram to the gpu. Idiot. >
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| From | Mild Shock <janburse@fastmail.fm> |
|---|---|
| Date | 2026-07-16 23:09 +0200 |
| Subject | VT100 25 x 80 terminal = 2000 Bytes (Re: Village Idiot wants 8088 back [Puting Troll]) |
| Message-ID | <113bhao$7d09$2@solani.org> |
| In reply to | #15642 |
Hi, Ok i misscalculated the 1k Byes. For 25 x 80 ASCII characters it would be 2000 Bytes. Sorry for the wrong adjustment of your VRAM. BTW, a VT100 had indeed 3000 Bytes: Released 1978 CPU Intel 8080 Memory 3 KB RAM https://en.wikipedia.org/wiki/VT100 So your 1GB were a little bit too high. The lower bound is probably 2000 to 3000 bytes. Happy now moron? Your 1GB were wroooong you were too optimistic, in your pessimism. Bye Mild Shock schrieb: > > Hi, > > Ha Ha, Village Idiot is Pissed and > wants his Intel 8088 back. There you > have boards with VRAM = 1k Byte. > > Well it fits you, since you are > a putin payed troll. Typically russian > or belarus 9000 level stupid. > > Bye > > Bobauk Modenov schrieb: > > Mild Shock wrote: > > > >> an integrated GPU (iGPU) used as an APU relies entirely on shared > system > >> RAM. Because the processor and graphics chip live on the same silicon > >> die, they do not have their own separate video memory > > > > idiot, yet another thing you dont undrestand, only max half of the > entire > > ram can be given to the gpu. Most of the laptops gives even less, say > max > > 1 GB of the "shared" ram to the gpu. Idiot. > > >
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