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The Wider von Neumann Neck (Re: FYI: Unified Memory Architecture (UMA)

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Hi,

You are a fucking moron, arent you?

Most of the stuff in my pi-WAM happens
inside the L1 and L2 caches of the GPU.
Which is faster than normal RAM and has

a wider von Neuann Neck. You can try
yourself, in case you find an AI Laptop
with similary specs as the Radeon 860M.

The example is open source:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

I already wrote pi-WAM is designed to
not use memory contention. In particalur
it also uses local variables like pc and

accu of the idependent thread states,
which seems to be also pretty speedy.

Bye

Tanner Babadzhan schrieb:
 > Mild Shock wrote:
 >
 >> These novel GPUs , that are part of AI Laptops, feature Unified Memory
 >> Architecture (UMA).
 >> In the case of my Ryzen the main memory is 32 GB,
 >
 > you are in error talking bullshit, the bottleneck there is the max 4 
GB/s,
 > 4 times by paralleling, however the proper gddr5/6 gpu arrays goes up to
 > 4,000 GB/s by parallel design
 >
 > GDDR7 (2025–2026 standard)
 >      Max Bandwidth: 1,792 GB/s (RTX 5090, 32GB)
 >

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        The Wider von Neumann Neck (Re: FYI: Unified Memory Architecture (UMA) Mild Shock <janburse@fastmail.fm> - 2026-07-10 07:51 +0200
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