Sputnik Schock: Academia is Disposable [I. J. Good Ultraintelligence] (Was: Introduction to AMBA® 4 ACE™ (2011))

From	Mild Shock <janburse@fastmail.fm>
Newsgroups	sci.physics.relativity, sci.math, comp.lang.prolog
Subject	Sputnik Schock: Academia is Disposable [I. J. Good Ultraintelligence] (Was: Introduction to AMBA® 4 ACE™ (2011))
Date	2025-12-01 23:53 +0100
Message-ID	<10gl691$vujj$1@solani.org> (permalink)
References	(7 earlier) <10gkuno$1mfrd$1@dont-email.me> <10gl01c$vqnp$1@solani.org> <10gl238$1nj5e$1@dont-email.me> <10gl3ru$vt77$1@solani.org> <10gl5b2$vu4n$1@solani.org>

Cross-posted to 3 groups.

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Hi,

Looking at how they phrase it:

"symposium focuses on improving the programming
productivity and performance engineering of all
concurrent and parallel systems—multicore, multi-
threaded, heterogeneous, clustered, and distributed
systems, grids, accelerators such as ASICs, GPUs,
FPGAs, data centers, clouds, large scale machines,
and quantum computers. PPoPP is also interested in
new and emerging parallel workloads and applications,
such as artificial intelligence and large-scale
scientific/enterprise workloads."
https://ppopp26.sigplan.org/track/PPoPP-2026-papers

It could be also that academia was overrun by the AI boom.
Is lost in the nowhere. That the techno lords have
created realities turning the academia into savages.

No wonder there is a call for automated AI researchers,
and automated AI engineers, by the AI industry itself.
And which might be the outcome of the current manhatten

project, also known as genesis mission. So that the AI
can be programmed by AI, AI which is more knowledgable
than tiny accademics. We are maybe heading towards a

first Ultraintelligence, that will then shape subsequent
Ultraintelligences. As described by I. J. Good:

"Let an ultraintelligent machine be defined as a machine
that can far surpass all the intellectual activities of
any man however clever. Since the design of machines is
one of these intellectual activities, an ultraintelligent
machine could design even better machines; there would
then unquestionably be an 'intelligence explosion,' and
the intelligence of man would be left far behind...
Thus the first ultraintelligent machine is the last
invention that man need ever make, provided that the
machine is docile enough to tell us how to keep it under
control. It is curious that this point is made so
seldom outside of science fiction. It is sometimes
worthwhile to take science fiction seriously."
https://exhibits.stanford.edu/feigenbaum/catalog/gz727rg3869

Bye

Mild Shock schrieb:
> Hi,
> 
> Come on squirrel brain, that we practically have
> PRAM on multi-core CPUs, is an old hat. ARM kept
> up with MESI/MOESI in 2011:
> 
> https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/CacheCoherencyWhitepaper_6June2011.pdf 
> 
> 
> What are you squirrel brain, some russion developer
> controlling a drone from within EMACS ? Meanwhile
> ARM and Intel and Snapdragon etc.. have developed
> 
> much more marvels than only this simple PRAM.
> The excitement on the side of ARM is quite big,
> that they got into the boat of OpenAI:
> 
> OpenAI co-founder on new deal with AMD
> https://www.youtube.com/watch?v=WuXCNpbO9hI
> 
> Bye
> 
> P.S.: Because of contention, you should of course
> only use volatile variables carefully. It might
> not scale well to 1000 cores.
> 
> There are also algorithms around to lift the
> pressure when there is a large amount of cores.
> Even Doug Lea has already put a few utilities in
> 
> java.concurrent.* for certain problems with large
> number of cores, kind of easter eggs in java.concurrent.*.
> But I am not sure whether Doug Lea is involved in
> 
> additions for AI accelerators. But he is in the
> Program Committee of:
> 
> Parallel programming for emerging hardware, including
> AI accelerators, processor-in-memory, programmable logic,
> non-volatile memory technologies, and quantum computers
> https://ppopp26.sigplan.org/track/PPoPP-2026-papers
> 
> It could be that the data flow compiler, things sketched
> by OpenXLA already work well enough.
> 
> Mild Shock schrieb:
>> Hi,
>>
>> I am not saying anything. Thats the definition of PRAM.
>> Whats wrong with you, are you a 5 year old moron.
>> I am only citing a theoretical computer science model:
>>
>> - Concurrent read concurrent write (CRCW)—multiple
>> processors can read and write. A CRCW PRAM is sometimes
>> called a concurrent random-access machine.
>> https://en.wikipedia.org/wiki/Parallel_RAM
>>
>> Technically with multi-channel memory nowadays, it
>> doesn't need locks on the hardware level, only tiny
>> serialization, could even happen outside of the CPU.
>>
>> So if you drop some barrier requirements, you could
>> really have the chaos of a PRAM, for worse or
>> for better. I think you need to accept that,
>>
>> even if its to big to fit in your tiny squirrel brain.
>>
>> Bye
>>
>> P.S.: "effectively CREW, since only one write per address at
>> a time", it will just block the other cores? Short answer:
>> Yes — if two cores try to write the same address, one
>>
>> of them is forced to stall (block) until the other completes.
>> In real hardware, the effect can mimic CRCW behavior over
>> a short time window, even though it’s not truly simultaneous.
>>
>> this blocking usually happens in the cache-coherence
>> system, not at DRAM. Modern CPUs use MESI/MOESI. It happens
>> over a small interval [t₁, t₂] dictated by cache coherence.
>>
>>  From the POINT OF VIEW OF AN ALGORITHM, it’s “CRCW enough.”
>>
>>
>> Bosephis Otlesnov schrieb:
>>> Mild Shock wrote:
>>>
>>>> What are you, a 5 year old moron?
>>>>
>>>> There are millions of algorithm that use volatile variables. Just look
>>>> at the Java code base.
>>>>
>>>> But I was not refering to multi-threading, I was refering to PRAM for
>>>> matrix operations.
>>>
>>> i thought you said you wanna read and write parallel to RAM, aka 
>>> PRAM, let
>>> me see.. zum zum zum, yeah, you said that. Take a lock at timing
>>> requirements for a read/write cycle, deadlines etc, shared memory or 
>>> not,
>>> fucking idiot.
>>>
>>
>

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Thread

What is analog computing nowadays? (Re: An old Busy Beaver ASIC (Application-Specific Integrated Circuit) (Was: Could AlphaEvolve find the sixth busy beaver ?) Mild Shock <janburse@fastmail.fm> - 2025-12-01 11:25 +0100
  Wake-up call until everybody gets ear-bleeding (Re: What is analog computing nowadays?) Mild Shock <janburse@fastmail.fm> - 2025-12-01 12:01 +0100
    BB(745) is independent of ZFC (Was: Wake-up call until everybody gets ear-bleeding) Mild Shock <janburse@fastmail.fm> - 2025-12-01 12:07 +0100
      Write ZFC formulas on a tape (of a Turing machine) (Re: BB(745) is independent of ZFC ) Mild Shock <janburse@fastmail.fm> - 2025-12-02 17:18 +0100
        Turing machines have neurons (Re: Write ZFC formulas on a tape (of a Turing machine)) Mild Shock <janburse@fastmail.fm> - 2025-12-02 17:19 +0100
          A logical calculus in nervous activity [McCulloch & Pitts 1943] (Re: Turing machines have neurons) Mild Shock <janburse@fastmail.fm> - 2025-12-02 17:20 +0100
            Busy Beaver and Theory Consistency (Was: A logical calculus in nervous activity [McCulloch & Pitts 1943]) Mild Shock <janburse@fastmail.fm> - 2025-12-02 17:39 +0100
            Busy Beaver and Theory Consistency (Was: A logical calculus in nervous activity [McCulloch & Pitts 1943]) Mild Shock <janburse@fastmail.fm> - 2025-12-02 17:43 +0100
              Re: Busy Beaver and Theory Consistency (Was: A logical calculus in nervous activity [McCulloch & Pitts 1943]) Mild Shock <janburse@fastmail.fm> - 2025-12-02 23:18 +0100
  Re: What is analog computing nowadays? (Re: An old Busy Beaver ASIC (Application-Specific Integrated Circuit) (Was: Could AlphaEvolve find the sixth busy beaver ?) Maciej Woźniak <mlwozniak@wp.pl> - 2025-12-01 12:09 +0100
    parallel random-access machine (parallel RAM or PRAM (Was: What is analog computing nowadays?) Mild Shock <janburse@fastmail.fm> - 2025-12-01 12:15 +0100
      Re: parallel random-access machine (parallel RAM or PRAM (Was: What is analog computing nowadays?) Maciej Woźniak <mlwozniak@wp.pl> - 2025-12-01 13:23 +0100
        Nope, you can't, because of the CRCW instuction (Was: parallel random-access machine) Mild Shock <janburse@fastmail.fm> - 2025-12-01 17:12 +0100
          Algorithm introduced in Hogwild! SGD (Niu et al., 2011) (Was: Nope, you can't, because of the CRCW instuction) Mild Shock <janburse@fastmail.fm> - 2025-12-01 17:31 +0100
            PRAMs might be closer to physics: Boltzman machines, etc.. (Was: Algorithm introduced in Hogwild! SGD) Mild Shock <janburse@fastmail.fm> - 2025-12-01 18:02 +0100
          Re: Nope, you can't, because of the CRCW instuction (Was: parallel random-access machine) Maciej Woźniak <mlwozniak@wp.pl> - 2025-12-01 17:59 +0100
            PRAMs might be closer to physics: Boltzman machines, etc.. (Re: Nope, you can't, because of the CRCW instuction) Mild Shock <janburse@fastmail.fm> - 2025-12-01 18:05 +0100
            PRAMs might be closer to physics: Boltzman machines, etc.. (Re: Nope, you can't, because of the CRCW instuction) Mild Shock <janburse@fastmail.fm> - 2025-12-01 18:08 +0100
              Physics more difficult than Rasperry LED cube? (Was: PRAMs might be closer to physics: Boltzman machines, etc..) Mild Shock <janburse@fastmail.fm> - 2025-12-01 18:25 +0100
        Re: parallel random-access machine (parallel RAM or PRAM (Was: What is analog computing nowadays?) Thomas Heger <ttt_heg@web.de> - 2025-12-03 07:17 +0100
          Re: parallel random-access machine (parallel RAM or PRAM (Was: What is  analog computing nowadays?) Python <python@cccp.invalid> - 2025-12-03 06:46 +0000
          Re: parallel random-access machine (parallel RAM or PRAM) Thomas 'PointedEars' Lahn <PointedEars@web.de> - 2025-12-03 08:02 +0100
      Linux kernel's RCU-protected hash tables (Re: Algorithm introduced in Hogwild! SGD (Niu et al., 2011)) Mild Shock <janburse@fastmail.fm> - 2025-12-01 22:26 +0100
        String interning is HashSet and not HashMap (Was: Linux kernel's RCU-protected hash tables) Mild Shock <janburse@fastmail.fm> - 2025-12-01 22:40 +0100
      POINT OF VIEW OF AN ALGORITHM (Re: Algorithm introduced in Hogwild! SGD (Niu et al., 2011)) (Re: parallel random-access machine) Mild Shock <janburse@fastmail.fm> - 2025-12-01 23:12 +0100
        Introduction to AMBA® 4 ACE™ (2011) (Was: POINT OF VIEW OF AN ALGORITHM) Mild Shock <janburse@fastmail.fm> - 2025-12-01 23:37 +0100
          Sputnik Schock: Academia is Disposable [I. J. Good Ultraintelligence] (Was: Introduction to AMBA® 4 ACE™ (2011)) Mild Shock <janburse@fastmail.fm> - 2025-12-01 23:53 +0100

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