Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > comp.lang.forth > #47616 > unrolled thread

Software for MISC M17

Back to article view | Back to comp.lang.forth

Contents

  Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-05-29 17:38 -0500
    Re: Software for MISC M17 Richard Owlett <rowlett@cloud85.net> - 2016-05-30 09:45 -0500
      Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-05-30 10:10 -0500
    Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-05-30 17:07 -0500
      Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-07 13:07 -0500
    Re: Software for MISC M17 hughaguilar96@gmail.com - 2016-05-30 18:10 -0700
      Re: Software for MISC M17 hughaguilar96@gmail.com - 2016-05-30 20:24 -0700
      Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-05-31 00:13 -0500
        Re: Software for MISC M17 Mat <dambere@web.de> - 2016-06-07 02:24 -0700
          Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-07 11:24 -0500
            Re: Software for MISC M17 jim.brakefield@ieee.org - 2016-06-07 11:13 -0700
            Re: Software for MISC M17 rickman <gnuarm@gmail.com> - 2016-06-07 19:15 -0400
              Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-07 19:08 -0500
      Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-06 12:49 -0500
        Re: Software for MISC M17 Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-06-07 11:00 +0100
          Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-07 10:58 -0500
            Re: Software for MISC M17 Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-06-11 22:45 +0100
              Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-11 17:29 -0500
                Re: Software for MISC M17 Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-06-12 13:07 +0100
    Re: Software for MISC M17 Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-06-07 10:35 +0100
      Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-07 11:12 -0500
      Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-08 15:43 -0500
        Re: Software for MISC M17 Lars Brinkhoff <lars.spam@nocrew.org> - 2016-06-09 09:32 +0200
          Re: Software for MISC M17 Cecil Bayona <cbayona@cbayona.com> - 2016-06-09 10:03 -0500

Page 1 of 2  [1] 2  Next page →

#47616 — Software for MISC M17

Looking at a future project using FPGAs to create a M17 CPU and I'm 
wondering if there are any Forth compilers, Assemblers, or 
Meta-Compilers available? A search on Google turned up nothing that led 
to a live link.

Thanks
-- 
Cecil - k5nwa

[toc] | [next] | [standalone]

#47627

On 5/29/2016 5:38 PM, Cecil Bayona wrote:
> Looking at a future project using FPGAs to create a M17 CPU and
> I'm wondering if there are any Forth compilers, Assemblers, or
> Meta-Compilers available? A search on Google turned up nothing
> that led to a live link.
>

You said "... that led to a live link."
If you found potentially interesting [but not currently live] 
links, you by wish to try http://archive.org/web/web.php .
HTH

[toc] | [prev] | [next] | [standalone]

#47629

On 5/30/2016 9:45 AM, Richard Owlett wrote:
> On 5/29/2016 5:38 PM, Cecil Bayona wrote:
>> Looking at a future project using FPGAs to create a M17 CPU and
>> I'm wondering if there are any Forth compilers, Assemblers, or
>> Meta-Compilers available? A search on Google turned up nothing
>> that led to a live link.
>>
>
> You said "... that led to a live link."
> If you found potentially interesting [but not currently live] links, you
> by wish to try http://archive.org/web/web.php .
> HTH
>

Thanks, but I tried them, the pages were there but the links to the 
files were not working. I tried them in several pages and it was all the 
same, the page was there but not the files.

I own the domain www.forthlang.org, there is nothing there, I been 
wondering if I should go around mirroring various Forth sites while they 
still exist, but asking permission in many cases from unknown sources 
sounds like too much trouble, but I have been backing up the ones I'm 
interested in.

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#47647

On 5/29/2016 5:38 PM, Cecil Bayona wrote:
> Looking at a future project using FPGAs to create a M17 CPU and I'm
> wondering if there are any Forth compilers, Assemblers, or
> Meta-Compilers available? A search on Google turned up nothing that led
> to a live link.
>
> Thanks

I'm also looking for Chuck Moore's MachineForth, I believe is an 
assembler that can be easily ported to other CPUs, looked in the Web and 
there are references to it but no source code.

Thanks

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#47923

On 5/30/2016 5:07 PM, Cecil Bayona wrote:
> On 5/29/2016 5:38 PM, Cecil Bayona wrote:
>> Looking at a future project using FPGAs to create a M17 CPU and I'm
>> wondering if there are any Forth compilers, Assemblers, or
>> Meta-Compilers available? A search on Google turned up nothing that led
>> to a live link.
>>
>> Thanks
>
> I'm also looking for Chuck Moore's MachineForth, I believe is an
> assembler that can be easily ported to other CPUs, looked in the Web and
> there are references to it but no source code.
>
> Thanks
>
I finally found a complete copy to machineforth for the F21 CPU, it's 
about 800 lines of code.

I'm still hoping to find a Windows/PC version that I can use as a basis 
to use in developing FPGA Forth CPUs. I would use it to generate the 
initial code to test new CPU instruction sets, then to generate a 
version of itself to reside in the target CPU..

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#47649

On Sunday, May 29, 2016 at 3:38:31 PM UTC-7, Cecil - k5nwa wrote:
> Looking at a future project using FPGAs to create a M17 CPU and I'm 
> wondering if there are any Forth compilers, Assemblers, or 
> Meta-Compilers available? A search on Google turned up nothing that led 
> to a live link.

A good FPGA project for you would be the PDP11 --- it is small (only 8 registers), but it is a good target for Forth (especially DTC).

Most likely C.H.Ting found a public-domain FPGA implementation of the 8080, which is why he chose it --- there may be public-domain FPGA implementations available of the PDP11 --- it is a much better choice for Forth than the 8080!

[toc] | [prev] | [next] | [standalone]

#47652

On Monday, May 30, 2016 at 6:10:12 PM UTC-7, hughag...@gmail.com wrote:
> On Sunday, May 29, 2016 at 3:38:31 PM UTC-7, Cecil - k5nwa wrote:
> > Looking at a future project using FPGAs to create a M17 CPU and I'm 
> > wondering if there are any Forth compilers, Assemblers, or 
> > Meta-Compilers available? A search on Google turned up nothing that led 
> > to a live link.
> 
> A good FPGA project for you would be the PDP11 --- it is small (only 8 registers), but it is a good target for Forth (especially DTC).
> 
> Most likely C.H.Ting found a public-domain FPGA implementation of the 8080, which is why he chose it --- there may be public-domain FPGA implementations available of the PDP11 --- it is a much better choice for Forth than the 8080!

It would be interesting to get a copy of RT11 and run that on your FPGA board --- a blast from the past!

[toc] | [prev] | [next] | [standalone]

#47653

On 5/30/2016 8:10 PM, hughaguilar96@gmail.com wrote:
> On Sunday, May 29, 2016 at 3:38:31 PM UTC-7, Cecil - k5nwa wrote:
>> Looking at a future project using FPGAs to create a M17 CPU and I'm
>> wondering if there are any Forth compilers, Assemblers, or
>> Meta-Compilers available? A search on Google turned up nothing that led
>> to a live link.
>
> A good FPGA project for you would be the PDP11 --- it is small (only 8 registers), but it is a good target for Forth (especially DTC).
>
> Most likely C.H.Ting found a public-domain FPGA implementation of the 8080, which is why he chose it --- there may be public-domain FPGA implementations available of the PDP11 --- it is a much better choice for Forth than the 8080!
>
I did the ep8080 just for following along with the workshop, I been 
looking at some very simple Forth CPUs that are fairly fast and some are 
around 200 lines of code. As for the PDP11, I have in the past used it 
at work, and studied it when I was designing my own CPU back in the 
early 70's so I like it, it's very nice to program it in assembler.

I been looking at some of the small 16 bit Forth CPUs such as the J1, 
ep16, B16, ep32, F21, M17, CPU16, ZPU, and others.

Most likely I will try one out that is in VHDL to make it easier on me, 
then when I get more proficient write one of these myself going from the 
block diagrams and the instruction set. Most of the ones I just 
mentioned have a Forth system or assembler available already so that 
will save time in testing it.

Some don't have software, such as the M17. That is also one reason why 
I'm looking for a copy of machineforth as it's suppose to be an easily 
ported assembler written in Forth.

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#47904

Am Dienstag, 31. Mai 2016 07:13:24 UTC+2 schrieb Cecil - k5nwa:
> I did the ep8080 just for following along with the workshop, I been 
> looking at some very simple Forth CPUs that are fairly fast and some are 
> around 200 lines of code. As for the PDP11, I have in the past used it 
> at work, and studied it when I was designing my own CPU back in the 
> early 70's so I like it, it's very nice to program it in assembler.
> 
> I been looking at some of the small 16 bit Forth CPUs such as the J1, 
> ep16, B16, ep32, F21, M17, CPU16, ZPU, and others.
If you are in search for a MISC style processor, I recommend the B16 as it is good documented and incorporate all common design principles associated with the work of Mr. Moore. In search for an early processor architecture which is well suited for Forth, the mc6809 is a good fit. You will find recent operating systems (like Niros09: https://sourceforge.net/p/nitros9/wiki/Main_Page), assemblers, home-build computer projects, FPGA implementations, emulators and Camelforth. The PDP11 architecture is more flexible though.

[toc] | [prev] | [next] | [standalone]

#47920

On 6/7/2016 4:24 AM, Mat wrote:
> Am Dienstag, 31. Mai 2016 07:13:24 UTC+2 schrieb Cecil - k5nwa:
>> I did the ep8080 just for following along with the workshop, I been
>> looking at some very simple Forth CPUs that are fairly fast and some are
>> around 200 lines of code. As for the PDP11, I have in the past used it
>> at work, and studied it when I was designing my own CPU back in the
>> early 70's so I like it, it's very nice to program it in assembler.
>>
>> I been looking at some of the small 16 bit Forth CPUs such as the J1,
>> ep16, B16, ep32, F21, M17, CPU16, ZPU, and others.
> If you are in search for a MISC style processor, I recommend the B16 as it is good documented and incorporate all common design principles associated with the work of Mr. Moore. In search for an early processor architecture which is well suited for Forth, the mc6809 is a good fit. You will find recent operating systems (like Niros09: https://sourceforge.net/p/nitros9/wiki/Main_Page), assemblers, home-build computer projects, FPGA implementations, emulators and Camelforth. The PDP11 architecture is more flexible though.
>
The MC6809 CPU is one of my all time favorites, it's instruction set is 
wonderful when writing code in assembler, or creating as compiler for 
it. Not sure how complex it would be to create without looking deeper 
but initially it ran with a horribly slow clock, on a FPGA it could 
possibly run 100X faster.

The reason I did not put the B16 in the list is not because of technical 
merits but because the lack of documenting on how to create the tools. 
There are a couple of articles but they mentioned that it's up to the 
user to write their own software.

Until I can get a PC version of machineforth so I can modify it to 
reflect the instruction set of the processor I have no effective way of 
testing the CPU, so it's off the list temporarily. The others I mention 
have a Forth compiler/assembler available for their implementations.

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#47924

On Tuesday, June 7, 2016 at 11:24:09 AM UTC-5, Cecil - k5nwa wrote:
> On 6/7/2016 4:24 AM, Mat wrote:
> > Am Dienstag, 31. Mai 2016 07:13:24 UTC+2 schrieb Cecil - k5nwa:
> >> I did the ep8080 just for following along with the workshop, I been
> >> looking at some very simple Forth CPUs that are fairly fast and some are
> >> around 200 lines of code. As for the PDP11, I have in the past used it
> >> at work, and studied it when I was designing my own CPU back in the
> >> early 70's so I like it, it's very nice to program it in assembler.
> >>
> >> I been looking at some of the small 16 bit Forth CPUs such as the J1,
> >> ep16, B16, ep32, F21, M17, CPU16, ZPU, and others.
> > If you are in search for a MISC style processor, I recommend the B16 as it is good documented and incorporate all common design principles associated with the work of Mr. Moore. In search for an early processor architecture which is well suited for Forth, the mc6809 is a good fit. You will find recent operating systems (like Niros09: https://sourceforge.net/p/nitros9/wiki/Main_Page), assemblers, home-build computer projects, FPGA implementations, emulators and Camelforth. The PDP11 architecture is more flexible though.
> >
> The MC6809 CPU is one of my all time favorites, it's instruction set is 
> wonderful when writing code in assembler, or creating as compiler for 
> it. Not sure how complex it would be to create without looking deeper 
> but initially it ran with a horribly slow clock, on a FPGA it could 
> possibly run 100X faster.
> 
> The reason I did not put the B16 in the list is not because of technical 
> merits but because the lack of documenting on how to create the tools. 
> There are a couple of articles but they mentioned that it's up to the 
> user to write their own software.
> 
> Until I can get a PC version of machineforth so I can modify it to 
> reflect the instruction set of the processor I have no effective way of 
> testing the CPU, so it's off the list temporarily. The others I mention 
> have a Forth compiler/assembler available for their implementations.
> 
> -- 
> Cecil - k5nwa

]> The MC6809 CPU is one of my all time favorites
Yes, with many ways to implement Forth.
Yes an FPGA version will run 100 times faster.
(see "6809 6309 compatible core" on www.opencores.org; see "system09" also)

Ugh, the LUT count is much higher than for the Forth machines:

]>I been looking at some of the small 16 bit Forth CPUs such as the J1, 
]>ep16, B16, ep32, F21, M17, CPU16, ZPU, and others. 
of which ssbcc (Small Stack Based Computer Compiler), J1 and microcore by Klaus Schieisiek appear to have the best combination of Fmax and LUT count.

Jim Brakefield

[toc] | [prev] | [next] | [standalone]

#47938

On 6/7/2016 12:24 PM, Cecil Bayona wrote:
> On 6/7/2016 4:24 AM, Mat wrote:
>> Am Dienstag, 31. Mai 2016 07:13:24 UTC+2 schrieb Cecil - k5nwa:
>>> I did the ep8080 just for following along with the workshop, I been
>>> looking at some very simple Forth CPUs that are fairly fast and some are
>>> around 200 lines of code. As for the PDP11, I have in the past used it
>>> at work, and studied it when I was designing my own CPU back in the
>>> early 70's so I like it, it's very nice to program it in assembler.
>>>
>>> I been looking at some of the small 16 bit Forth CPUs such as the J1,
>>> ep16, B16, ep32, F21, M17, CPU16, ZPU, and others.
>> If you are in search for a MISC style processor, I recommend the B16
>> as it is good documented and incorporate all common design principles
>> associated with the work of Mr. Moore. In search for an early
>> processor architecture which is well suited for Forth, the mc6809 is a
>> good fit. You will find recent operating systems (like Niros09:
>> https://sourceforge.net/p/nitros9/wiki/Main_Page), assemblers,
>> home-build computer projects, FPGA implementations, emulators and
>> Camelforth. The PDP11 architecture is more flexible though.
>>
> The MC6809 CPU is one of my all time favorites, it's instruction set is
> wonderful when writing code in assembler, or creating as compiler for
> it. Not sure how complex it would be to create without looking deeper
> but initially it ran with a horribly slow clock, on a FPGA it could
> possibly run 100X faster.
>
> The reason I did not put the B16 in the list is not because of technical
> merits but because the lack of documenting on how to create the tools.
> There are a couple of articles but they mentioned that it's up to the
> user to write their own software.
>
> Until I can get a PC version of machineforth so I can modify it to
> reflect the instruction set of the processor I have no effective way of
> testing the CPU, so it's off the list temporarily. The others I mention
> have a Forth compiler/assembler available for their implementations.

When I designed my MISC CPU, I just hand coded the assembly.  I think 
you will find the B16 to be similarly easy program in machine code to 
start.  The tools are very easy to write for such a simple instruction 
set.  That's one of the great things about MISC.

I believe the J1 has tools available, maybe even source?  Is that a 
contender?  The creator did a write up comparing it to the microblaze I 
believe in the same application and it ran faster with a smaller 
executable, both of which were important for his application.

-- 

Rick C

[toc] | [prev] | [next] | [standalone]

#47940

On 6/7/2016 6:15 PM, rickman wrote:
> On 6/7/2016 12:24 PM, Cecil Bayona wrote:
>> On 6/7/2016 4:24 AM, Mat wrote:
>>> Am Dienstag, 31. Mai 2016 07:13:24 UTC+2 schrieb Cecil - k5nwa:
>>>> I did the ep8080 just for following along with the workshop, I been
>>>> looking at some very simple Forth CPUs that are fairly fast and some
>>>> are
>>>> around 200 lines of code. As for the PDP11, I have in the past used it
>>>> at work, and studied it when I was designing my own CPU back in the
>>>> early 70's so I like it, it's very nice to program it in assembler.
>>>>
>>>> I been looking at some of the small 16 bit Forth CPUs such as the J1,
>>>> ep16, B16, ep32, F21, M17, CPU16, ZPU, and others.
>>> If you are in search for a MISC style processor, I recommend the B16
>>> as it is good documented and incorporate all common design principles
>>> associated with the work of Mr. Moore. In search for an early
>>> processor architecture which is well suited for Forth, the mc6809 is a
>>> good fit. You will find recent operating systems (like Niros09:
>>> https://sourceforge.net/p/nitros9/wiki/Main_Page), assemblers,
>>> home-build computer projects, FPGA implementations, emulators and
>>> Camelforth. The PDP11 architecture is more flexible though.
>>>
>> The MC6809 CPU is one of my all time favorites, it's instruction set is
>> wonderful when writing code in assembler, or creating as compiler for
>> it. Not sure how complex it would be to create without looking deeper
>> but initially it ran with a horribly slow clock, on a FPGA it could
>> possibly run 100X faster.
>>
>> The reason I did not put the B16 in the list is not because of technical
>> merits but because the lack of documenting on how to create the tools.
>> There are a couple of articles but they mentioned that it's up to the
>> user to write their own software.
>>
>> Until I can get a PC version of machineforth so I can modify it to
>> reflect the instruction set of the processor I have no effective way of
>> testing the CPU, so it's off the list temporarily. The others I mention
>> have a Forth compiler/assembler available for their implementations.
>
> When I designed my MISC CPU, I just hand coded the assembly.  I think
> you will find the B16 to be similarly easy program in machine code to
> start.  The tools are very easy to write for such a simple instruction
> set.  That's one of the great things about MISC.
>
> I believe the J1 has tools available, maybe even source?  Is that a
> contender?  The creator did a write up comparing it to the microblaze I
> believe in the same application and it ran faster with a smaller
> executable, both of which were important for his application.
>

Yes you can write the test by hand, the instruction sets are simple enough.

The first MISC CPU to implement in a couple of days will be the J1, it's 
so simple, runs well, and has tools already developed, next will be the 
ep16, the same applies, after that I shall have to do some thinking on it.

I'm still looking for machineforth for the Pentium to use when I create 
or modify a CPU, I'm not familiar on assembler for the Intel Family 
other than the I8085 so I'm looking for one already setup for DOS/Windows.

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#47880

On 5/30/2016 8:10 PM, hughaguilar96@gmail.com wrote:
> On Sunday, May 29, 2016 at 3:38:31 PM UTC-7, Cecil - k5nwa wrote:
>> Looking at a future project using FPGAs to create a M17 CPU and I'm
>> wondering if there are any Forth compilers, Assemblers, or
>> Meta-Compilers available? A search on Google turned up nothing that led
>> to a live link.
>
> A good FPGA project for you would be the PDP11 --- it is small (only 8 registers), but it is a good target for Forth (especially DTC).
>
> Most likely C.H.Ting found a public-domain FPGA implementation of the 8080, which is why he chose it --- there may be public-domain FPGA implementations available of the PDP11 --- it is a much better choice for Forth than the 8080!
>
It's on my list of CPUs to implement but I will have to create that one 
from scratch so I will not work on it until I'm familiar with the tools 
and VHDL, so first a couple of simple 16 Forth CPUs, the ep16, and the 
J1 as a learning vehicle.

I've seen some articles that say the PDP11 is difficult to implement, 
but I'm not sure what version they were talking about.

What I will do is take a block diagram, programming model, and the 
instruction set and go from there, it will not be  a cycle by cycle 
identical port at first, programming and functionally wise the will be 
the same, but not the timing, that can come later, maybe. The FPGA 
hardware and external RAM is so much faster than the old hardware, that 
to make a timing identical unit one would have to run the FPGA with a 
slow clock so there might not be a whole lot of point to making it 
timing identical.

Back in the early 70's I designed a CPU that was very advanced and fast 
for the day as far as home built units would go. it was quite fast and 
had many innovative ideas put into it. Researching computer architecture 
was half the fun, no Internet then, so many trips to the University 
library. It had 16 registers, Index registers, could address 64K of RAM, 
had interrupts, Banks of registers so no massive pushing and popping 
registers, each interrupt or subroutine could have it's own set of 
registers, and various addressing modes, including auto 
increment/decrement addressing modes.

I misunderstood what a micro-programmed instruction set consisted of, 
but reading lately I see that the unit was a micro-programmed CPU, I 
though it had to be user changeable on the fly but that is not so. 
Eventually I would like to visit that design and make it a 32 bit CPU 
instead of a 8 bit CPU, I still remember a lot of details about it, I 
was incredibly proud of it at the time and created my own assembler and 
monitor on paper, and  used EPROM to hold the software, which was not 
how things were usually done.

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#47906

On Mon, 6 Jun 2016 12:49:13 -0500
Cecil Bayona <cbayona@cbayona.com> wrote:

> On 5/30/2016 8:10 PM, hughaguilar96@gmail.com wrote:
[...]
> > A good FPGA project for you would be the PDP11 --- it is
> > small (only 8 registers), but it is a good target for Forth
> > (especially DTC).
[...]
> It's on my list of CPUs to implement but I will have to create
> that one from scratch so I will not work on it until I'm
> familiar with the tools and VHDL, so first a couple of simple
> 16 Forth CPUs, the ep16, and the J1 as a learning vehicle.

If you like single tool development, and a short edit-test
cycle, there is a Python library, myhdl[1], which can simulate
hardware and export Verilog/VHDL for FPGA synthesis.

I have running and partially tested myhdl source for j1, b16 and
1802 CPU systems, email me if interested. 

Jan Coombs
-- 
[1] myhdl.org

[toc] | [prev] | [next] | [standalone]

#47917

On 6/7/2016 5:00 AM, Jan Coombs wrote:
> On Mon, 6 Jun 2016 12:49:13 -0500
> Cecil Bayona <cbayona@cbayona.com> wrote:
>
>> On 5/30/2016 8:10 PM, hughaguilar96@gmail.com wrote:
> [...]
>>> A good FPGA project for you would be the PDP11 --- it is
>>> small (only 8 registers), but it is a good target for Forth
>>> (especially DTC).
> [...]
>> It's on my list of CPUs to implement but I will have to create
>> that one from scratch so I will not work on it until I'm
>> familiar with the tools and VHDL, so first a couple of simple
>> 16 Forth CPUs, the ep16, and the J1 as a learning vehicle.
>
> If you like single tool development, and a short edit-test
> cycle, there is a Python library, myhdl[1], which can simulate
> hardware and export Verilog/VHDL for FPGA synthesis.
>
> I have running and partially tested myhdl source for j1, b16 and
> 1802 CPU systems, email me if interested.
>
> Jan Coombs
>
Thanks for the ideas, I have MyHDL bookmarked and on my list of items to 
try out later, as having to learn Python is an added step but it sounds 
good in concept. First I need to get familiar with VHDL before I branch out.

I will email you later as I'm interested is some of those processors.

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#48042

On Tue, 7 Jun 2016 10:58:34 -0500
Cecil Bayona <cbayona@cbayona.com> wrote:

> Thanks for the ideas, I have MyHDL bookmarked and on my list
> of items to try out later, as having to learn Python is an
> added step but it sounds good in concept. First I need to get
> familiar with VHDL before I branch out.

I was curious, found the ep16 source, and had a go at quick
translation to MyHDL, and divided the processor into smaller
factors: 

./
├── [8.4K 2016-06-11_13:03:23]  ep16_CPU.py
├── [5.4K 2016-06-10_19:37:46]  ep16_Decode.py
├── [2.0K 2016-06-09_23:13:31]  ep16_OpCodes.py
├── [2.2K 2016-06-10_22:59:16]  ep16_ram.py
├── [2.2K 2016-06-11_14:24:02]  ep16_Stack.py
├── [ 798 2016-06-11_14:20:04]  stack.v
├── [1.2K 2016-06-11_14:20:04]  stack.vhd
└── [2.3K 2016-06-11_12:29:47]  test_ep16.py

The stack is working, includes a simple test, and exports VHDL
and Verilog. Though simple this shows the same function in three
languages. 

I'd like to see one of these processors boot from a port, then
it would be possible to build an array of them.  This would also
make it possible to run code in an FPGA (or simulation) without
needing to run the toolchain to integrate a new memory image. 

I'll put the files up somewhere when complete, but can zip and
mail now if requested. 

Jan Coombs
--
email valid at present

[toc] | [prev] | [next] | [standalone]

#48048

On 6/11/2016 4:45 PM, Jan Coombs wrote:
> On Tue, 7 Jun 2016 10:58:34 -0500
> Cecil Bayona <cbayona@cbayona.com> wrote:
>
>> Thanks for the ideas, I have MyHDL bookmarked and on my list
>> of items to try out later, as having to learn Python is an
>> added step but it sounds good in concept. First I need to get
>> familiar with VHDL before I branch out.
>
> I was curious, found the ep16 source, and had a go at quick
> translation to MyHDL, and divided the processor into smaller
> factors:
>
> ./
> ├── [8.4K 2016-06-11_13:03:23]  ep16_CPU.py
> ├── [5.4K 2016-06-10_19:37:46]  ep16_Decode.py
> ├── [2.0K 2016-06-09_23:13:31]  ep16_OpCodes.py
> ├── [2.2K 2016-06-10_22:59:16]  ep16_ram.py
> ├── [2.2K 2016-06-11_14:24:02]  ep16_Stack.py
> ├── [ 798 2016-06-11_14:20:04]  stack.v
> ├── [1.2K 2016-06-11_14:20:04]  stack.vhd
> └── [2.3K 2016-06-11_12:29:47]  test_ep16.py
>
> The stack is working, includes a simple test, and exports VHDL
> and Verilog. Though simple this shows the same function in three
> languages.
>
> I'd like to see one of these processors boot from a port, then
> it would be possible to build an array of them.  This would also
> make it possible to run code in an FPGA (or simulation) without
> needing to run the toolchain to integrate a new memory image.
>
> I'll put the files up somewhere when complete, but can zip and
> mail now if requested.
>
> Jan Coombs
> --
> email valid at present
>
How easy is to use a tool like MyHDL to convert the machine definition 
Python files to HDL? I briefly have looked at Python and it looks easy 
to use compared to VHDL, with the proviso that I have not looked at 
Python in detail. I've ordered several books on Python including some 
Kindle versions.

I'm new at this so I would be interested in getting a copy of your 
sources. Comparison between different versions is useful in 
understanding what is going on.

-- 
Cecil - k5nwa

[toc] | [prev] | [next] | [standalone]

#48053

On Sat, 11 Jun 2016 17:29:58 -0500
Cecil Bayona <cbayona@cbayona.com> wrote:

> How easy is to use a tool like MyHDL to convert the machine
> definition Python files to HDL? I briefly have looked at
> Python and it looks easy to use compared to VHDL, with the
> proviso that I have not looked at Python in detail. I've
> ordered several books on Python including some Kindle versions.

Once python and myhdl are installed (see myhdl.org) the script
below defines the logic, runs the simulation, and exports the
VHDL and Verilog for logic chip synthesis. 

Jan Coombs
-- 


"""         ep16_Stack_60col.py

2016-06-12 jc version with width reduced to 60 columns
"""

from myhdl import *


def Stack(popData, pushData,pop,push,clk, lg2dpth):
  ''' build stack (output, inputs, constant)'''
  
  # derive data path width, define memory array & pointers
  dpw = len(pushData)  

  stackmem = \
    [Signal(intbv(0)[dpw:]) for i in range(2**lg2dpth)]

  sp, spDecd, spIncd = \
    [Signal(modbv(0)[lg2dpth:]) for i in range(3)] 
  
  @always_comb  
  def stkIncDecLogic():
    ''' calc next pointer values '''
    spDecd.next = sp - 1 
    spIncd.next = sp + 1 

  @always_comb 
  def stackReadLogic():
    ''' read top of stack '''
    popData.next = stackmem[sp]
         
  @always(clk.posedge) 
  def stackWriteLogic():
    ''' action push or pop '''
    if push: 
      stackmem[spIncd].next = pushData;
      sp.next = spIncd 
    elif pop:
      sp.next = spDecd
        
  return stkIncDecLogic, stackReadLogic, stackWriteLogic
  # or,  return instances() 


# Outline Testing
# ---------------

# set constants
width=16
lg2dpth=3  # use 3 for 8 item stack

# create interface signals
popData = Signal(intbv(0)[width:])
pushData = Signal(intbv(0)[width:])
clk, pop, push = [Signal(bool()) for ii in range(3)]


def testStack():
  ''' test stack functions '''

  dut = Stack(popData, pushData,pop,push,clk, lg2dpth)
  
  @instance
  def check():
    ''' test framework '''
    push.next = 1
    for i in range(1,5):
      pushData.next = i
      yield delay(10)
      clk.next = 1
      yield delay(10)
      clk.next = 0
    push.next = 0
    
    pop.next = 1
    for i in range(4,0,-1):
      yield delay(10)
      #print i, popData  # debug check
      assert i==popData  # report error, kill job
      yield delay(10)
      clk.next = 1
      yield delay(10)
      clk.next = 0
    pop.next = 0
 
    print "ep16_Stack - test passed "  # for unbelievers
    
  return dut, check


def simulate(timesteps):
  ''' run simulator, convert to Verilog and VHDL '''
  toVerilog(Stack, popData, pushData,pop,push,clk, lg2dpth)
  toVHDL(Stack, popData, pushData,pop,push,clk, lg2dpth)
  sim = Simulation(testStack())
  sim.run(timesteps)

simulate(250)

[toc] | [prev] | [next] | [standalone]

#47905

On Sun, 29 May 2016 17:38:25 -0500
Cecil Bayona <cbayona@cbayona.com> wrote:

> Looking at a future project using FPGAs to create a M17 CPU
> and I'm wondering if there are any Forth compilers,
> Assemblers, or Meta-Compilers available? A search on Google
> turned up nothing that led to a live link.

The prime advantage of the M17 seems to be it's use of a single
unified memory. 

For a FPGA design this would be no advantage, because many small
memory blocks are available, so the stacks can each have their
own memory areas, separate from code/data space. 

The j1 has multiple sets of support tools, and if you want to
try Chucks more recent design style there is the b16, which
comes with full tools. 

Jan Coombs. 

[toc] | [prev] | [next] | [standalone]

Page 1 of 2  [1] 2  Next page →

Back to top | Article view | comp.lang.forth

csiph-web