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Groups > comp.lang.forth > #57698 > unrolled thread
| Started by | JUERGEN <epldfpga@aol.com> |
|---|---|
| First post | 2017-04-21 00:49 -0700 |
| Last post | 2017-04-26 01:38 -0400 |
| Articles | 20 on this page of 195 — 20 participants |
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Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started JUERGEN <epldfpga@aol.com> - 2017-04-21 00:49 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Paul Rubin <no.email@nospam.invalid> - 2017-04-21 01:17 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started JUERGEN <epldfpga@aol.com> - 2017-04-21 01:47 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-21 18:55 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Clive Arthur <cliveta@nowaytoday.co.uk> - 2017-04-22 19:48 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-22 14:50 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-23 00:23 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-23 11:13 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-23 16:14 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-23 19:34 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-23 21:52 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-23 21:59 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 02:20 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 04:04 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 13:40 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 14:41 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 18:22 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 15:28 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 18:44 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 19:34 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 16:41 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 20:36 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 04:44 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 12:41 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 10:03 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-24 12:20 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 14:12 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-24 15:13 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 16:59 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 14:35 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-24 17:19 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 15:36 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Mark Wills <markwills1970@gmail.com> - 2017-04-25 01:26 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 11:21 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 09:50 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 12:37 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 14:11 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 13:51 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 15:14 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 14:15 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 11:34 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 11:38 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 11:39 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 14:00 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 15:15 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 12:27 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 16:04 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 13:36 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 17:03 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 12:42 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 12:55 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 15:16 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 14:22 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 15:51 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 13:27 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 13:19 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 11:38 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 13:59 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 12:36 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 14:49 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 14:29 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 16:30 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 15:57 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 17:11 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 14:12 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 17:38 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 16:41 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 15:11 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 17:32 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Mark Wills <markwills1970@gmail.com> - 2017-04-26 03:33 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-26 11:33 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-26 14:05 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-26 17:24 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-26 14:51 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-26 18:29 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-26 16:18 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-26 21:07 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-27 01:52 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Mark Wills <markwills1970@gmail.com> - 2017-04-27 02:10 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-27 02:22 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 11:10 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 11:25 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 11:08 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Alex <alex@rivadpm.com> - 2017-04-27 16:14 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Alex <alex@rivadpm.com> - 2017-04-27 16:17 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 11:46 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-27 14:07 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 17:58 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Paul Rubin <no.email@nospam.invalid> - 2017-04-26 20:34 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 01:07 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Paul Rubin <no.email@nospam.invalid> - 2017-04-27 21:21 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2017-04-28 08:54 +0000
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2017-04-28 10:46 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2017-04-27 10:46 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Lars Brinkhoff <lars.spam@nocrew.org> - 2017-04-27 12:05 +0200
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 11:50 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Lars Brinkhoff <lars.spam@nocrew.org> - 2017-04-28 11:23 +0200
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started john <anon@example.com> - 2017-04-27 11:43 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 11:57 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 11:21 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 11:58 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Andrew Haley <andrew29@littlepinkcloud.invalid> - 2017-04-28 07:53 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2017-04-28 22:31 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-28 20:14 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2017-04-30 16:08 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2017-04-29 13:48 +0000
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-29 10:45 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2017-04-27 15:49 +0000
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2017-04-29 00:27 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-28 20:28 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2017-04-29 14:15 +0000
Stack processor address regs . was Ting's EP32 32 Bit Processor Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2017-05-01 13:45 +0100
Re: Stack processor address regs . was Ting's EP32 32 Bit Processor anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2017-05-02 13:15 +0000
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started jim.brakefield@ieee.org - 2017-04-28 18:20 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Coos Haak <htrofhc@gmail.com> - 2017-04-29 13:00 +0200
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started "Rudy Velthuis" <newsgroups@rvelthuis.de> - 2017-04-29 11:47 +0000
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Coos Haak <htrofhc@gmail.com> - 2017-04-29 15:02 +0200
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started jim.brakefield@ieee.org - 2017-04-30 18:32 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-26 20:40 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 01:21 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-26 21:14 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-27 02:17 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Mark Wills <markwills1970@gmail.com> - 2017-04-27 05:05 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started john <anon@example.com> - 2017-04-27 13:35 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Mark Wills <markwills1970@gmail.com> - 2017-04-27 05:42 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Alex <alex@rivadpm.com> - 2017-04-27 14:00 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Mark Wills <markwills1970@gmail.com> - 2017-04-27 06:04 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Alex <alex@rivadpm.com> - 2017-04-27 15:31 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 12:26 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Julian Fondren <julian.fondren@gmail.com> - 2017-04-29 08:04 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started john <anon@example.com> - 2017-04-27 10:30 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 12:32 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started john <anon@example.com> - 2017-04-28 12:01 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-26 21:34 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-27 01:26 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Paul Rubin <no.email@nospam.invalid> - 2017-04-27 21:25 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-28 02:50 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started pahihu <pahihu@gmail.com> - 2017-04-28 00:23 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2017-04-28 07:46 +0000
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Mark Wills <markwills1970@gmail.com> - 2017-04-28 02:25 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-28 05:35 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Walter Banks <walter@bytecraft.com> - 2017-04-28 14:55 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 13:58 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Andrew Haley <andrew29@littlepinkcloud.invalid> - 2017-04-26 04:11 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2017-04-25 19:54 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 14:32 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2017-04-25 23:25 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 14:40 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Paul Rubin <no.email@nospam.invalid> - 2017-04-23 14:27 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-23 20:35 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Paul Rubin <no.email@nospam.invalid> - 2017-04-23 19:09 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Clive Arthur <cliveta@nowaytoday.co.uk> - 2017-04-25 15:33 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Walter Banks <walter@bytecraft.com> - 2017-04-25 13:20 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 14:00 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Walter Banks <walter@bytecraft.com> - 2017-04-26 14:27 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 13:58 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Lars Brinkhoff <lars.spam@nocrew.org> - 2017-04-25 20:15 +0200
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 15:07 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Lars Brinkhoff <lars.spam@nocrew.org> - 2017-04-25 21:37 +0200
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2017-04-26 14:28 +0000
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-26 12:17 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Clive Arthur <cliveta@nowaytoday.co.uk> - 2017-04-26 18:48 +0100
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Lars Brinkhoff <lars.spam@nocrew.org> - 2017-04-26 21:15 +0200
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Paul Rubin <no.email@nospam.invalid> - 2017-04-25 18:39 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-26 00:25 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Lars Brinkhoff <lars.spam@nocrew.org> - 2017-04-26 09:58 +0200
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-26 17:43 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 13:10 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 16:42 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 16:06 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 14:25 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 17:52 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-23 00:18 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-22 13:28 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started JUERGEN <epldfpga@aol.com> - 2017-04-23 05:06 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-23 06:38 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started JUERGEN <epldfpga@aol.com> - 2017-04-23 11:24 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-23 12:17 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started JUERGEN <epldfpga@aol.com> - 2017-04-23 23:43 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 04:16 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started JUERGEN <epldfpga@aol.com> - 2017-04-24 06:18 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 14:28 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-24 17:00 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 15:10 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-24 17:43 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 16:40 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-24 21:16 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-25 09:42 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Cecil Bayona <cbayona@cbayona.com> - 2017-04-25 12:22 -0500
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-24 14:28 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started Ilya Tarasov <ilya74.tarasov@gmail.com> - 2017-04-24 15:03 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 15:39 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-25 20:44 -0400
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started hughaguilar96@gmail.com - 2017-04-25 22:25 -0700
Re: Ting's EP32 32 Bit Processor IP with eForth eBook is available now and the Project page started rickman <gnuarm@gmail.com> - 2017-04-26 01:38 -0400
Page 9 of 10 — ← Prev page 1 … 7 8 [9] 10 Next page →
| From | rickman <gnuarm@gmail.com> |
|---|---|
| Date | 2017-04-26 12:17 -0400 |
| Message-ID | <odqh0b$66a$1@dont-email.me> |
| In reply to | #58181 |
On 4/26/2017 10:28 AM, Anton Ertl wrote: > a or b = a+b - (a and b) I don't recall this identity and it does not appear obvious by inspection. If we treat this as arithmetic (which should be valid with Boolean operators as long as we don't change them) we get (a or b) + (a and b) = a+b Let's test... a = 1011 b = 0110 a or b = 1111 a and b = 0010 (a or b) + (a and b) = 10001 a+b = 10001 I guess in the original formula the carries in a+b are reversed by borrows from -(a and b) Still, I can't see much use for using arithmetic to implement XOR when it can be done using logical operator(s). > : xor 2dup nand tuck nand >r nand r> nand ; For purposes of comparing stack processor instruction sets I don't see this as a good definition because TUCK is not very close to a primitive. It requires inserting an item into the third position on the stack which is not at all easy unless the top two elements are held in registers. Certainly it would not be high on the list of desired primitives which is what this subthread is about. How about this? : xor 2dup nand >r INVERT SWAP INVERT nand r> nand INVERT ; That's 10 primitives, whew! Lars' sum is looking good at this point. Anything shorter without adding several logical primitives? -- Rick C
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| From | Clive Arthur <cliveta@nowaytoday.co.uk> |
|---|---|
| Date | 2017-04-26 18:48 +0100 |
| Message-ID | <odqmbf$p7k$1@dont-email.me> |
| In reply to | #58187 |
On 26/04/2017 17:17, rickman wrote:
> On 4/26/2017 10:28 AM, Anton Ertl wrote:
>> a or b = a+b - (a and b)
>
> I don't recall this identity and it does not appear obvious by
> inspection. If we treat this as arithmetic (which should be valid with
> Boolean operators as long as we don't change them) we get
>
> (a or b) + (a and b) = a+b
>
> Let's test...
>
> a = 1011
> b = 0110
>
> a or b = 1111
> a and b = 0010
> (a or b) + (a and b) = 10001
> a+b = 10001
>
> I guess in the original formula the carries in a+b are reversed by
> borrows from -(a and b)
>
> Still, I can't see much use for using arithmetic to implement XOR when
> it can be done using logical operator(s).
>
>
>> : xor 2dup nand tuck nand >r nand r> nand ;
>
> For purposes of comparing stack processor instruction sets I don't see
> this as a good definition because TUCK is not very close to a primitive.
> It requires inserting an item into the third position on the stack
> which is not at all easy unless the top two elements are held in
> registers. Certainly it would not be high on the list of desired
> primitives which is what this subthread is about. How about this?
>
> : xor 2dup nand >r INVERT SWAP INVERT nand r> nand INVERT ;
>
> That's 10 primitives, whew! Lars' sum is looking good at this point.
> Anything shorter without adding several logical primitives?
: xor
2dup nand >r
r@ nand swap
r> nand
nand
;
Possibly.
Cheers
--
Clive
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| From | Lars Brinkhoff <lars.spam@nocrew.org> |
|---|---|
| Date | 2017-04-26 21:15 +0200 |
| Message-ID | <86fugvkmjx.fsf@molnjunk.nocrew.org> |
| In reply to | #58187 |
rickman wrote: > Still, I can't see much use for using arithmetic to implement XOR when > it can be done using logical operator(s). As I wrote, one reason was that I have NAND and + as a (required) primitives in my Forth. And nothing else for arithmetic and logic. > : xor 2dup nand >r INVERT SWAP INVERT nand r> nand INVERT ; > > That's 10 primitives, whew! That's the most obvious formula, but I don't have INVERT, so it's even worse in my Forth.
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| From | Paul Rubin <no.email@nospam.invalid> |
|---|---|
| Date | 2017-04-25 18:39 -0700 |
| Message-ID | <87zif4dk20.fsf@nightsong.com> |
| In reply to | #58107 |
rickman <gnuarm@gmail.com> writes: > How about not having the AND instruction? Did the PDP-11 have AND? I remember it had BIC (bit clear) which used the source operand as a bit mask to clear bits in the dest operand. But I believe that to get AND you had to do NOT followed by BIC.
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| From | rickman <gnuarm@gmail.com> |
|---|---|
| Date | 2017-04-26 00:25 -0400 |
| Message-ID | <odp7a0$m8$1@dont-email.me> |
| In reply to | #58167 |
On 4/25/2017 9:39 PM, Paul Rubin wrote: > rickman <gnuarm@gmail.com> writes: >> How about not having the AND instruction? > > Did the PDP-11 have AND? I remember it had BIC (bit clear) which used > the source operand as a bit mask to clear bits in the dest operand. But > I believe that to get AND you had to do NOT followed by BIC. That's what the TMS-9900 had. I'd have to look up the PDP-11 instruction set. It's been far too long. I just remember looking at octal listing data rather than hex. -- Rick C
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| From | Lars Brinkhoff <lars.spam@nocrew.org> |
|---|---|
| Date | 2017-04-26 09:58 +0200 |
| Message-ID | <86o9vjlhwq.fsf@molnjunk.nocrew.org> |
| In reply to | #58167 |
Paul Rubin wrote: > Did the PDP-11 have AND? I remember it had BIC (bit clear) which used > the source operand as a bit mask to clear bits in the dest operand. But > I believe that to get AND you had to do NOT followed by BIC. I have ported my Forth to the PDP-11, so I can check my assembler. No, it does not have an AND, just BIC. OR is called BIS, and NOT is called COM. XOR is an architectural addition, not available in early models.
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| From | rickman <gnuarm@gmail.com> |
|---|---|
| Date | 2017-04-26 17:43 -0400 |
| Message-ID | <odr437$9qs$1@dont-email.me> |
| In reply to | #58173 |
On 4/26/2017 3:58 AM, Lars Brinkhoff wrote: > Paul Rubin wrote: >> Did the PDP-11 have AND? I remember it had BIC (bit clear) which used >> the source operand as a bit mask to clear bits in the dest operand. But >> I believe that to get AND you had to do NOT followed by BIC. > > I have ported my Forth to the PDP-11, so I can check my assembler. No, > it does not have an AND, just BIC. OR is called BIS, and NOT is called > COM. XOR is an architectural addition, not available in early models. So far : xor 2dup nand 1+ dup + + + ; is the smallest solution. Just for the record, 2dup is another instruction that is hard to do in one clock as it requires two pushes to the stack. Better so show over over. But every solution so far uses the same function, it's a wash in regards to comparing solutions. Good thing the dynamic instruction frequency of this operation is well below even 1% according to Koopman. -- Rick C
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| From | hughaguilar96@gmail.com |
|---|---|
| Date | 2017-04-25 13:10 -0700 |
| Message-ID | <b7c00519-3b5e-4a9e-a329-cef69e787335@googlegroups.com> |
| In reply to | #57842 |
On Saturday, April 22, 2017 at 12:50:57 PM UTC-7, Cecil - k5nwa wrote: > On 4/22/2017 1:48 PM, Clive Arthur wrote: > > On 21/04/2017 23:55, rickman wrote: > >> On 4/21/2017 3:49 AM, JUERGEN wrote: > >>> see https://www.amazon.com/dp/B071D3XMPS and > >>> https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is > >>> running eForth on my desk in a low cost Lattice DevBoard and there has > >>> been an ASIC implementation in the past already as google told me > >> > >> Does this processor have any particular purpose or advantage over other > >> stack processors? > >> > > It seems it's small, but with a limited instruction set, so some simple > > Forth words may take several clock cycles. For example, OR is made with > > com pushr com popr and com, which I guess would be > > > > : or > > not >r not r> and not > > ; > > > > Looks a bit tedious, but maybe if you're pushed for space and speed > > isn't everything... > > > > Cheers > The designer chose to use 5 bits for the instructions but he made > provisions for 6 bits but of course changes are needed to be made to > implement that, it would allow for 64 primitives instead of 32. Still > the most often used words are primitives that execute in one clock, the > "or" happens to be one of instructions left out because the limit with 5 > bits. > > I intend to make the instruction word 6 bits and add extra primitives, > there is plenty of space in the FPGA left, All the available RAM is not > being used either and that is another change I intend to make when I > finish my current software project. This idea was considered when the MiniForth project started at Testra. We would have a 5-bit instruction field and have 32 primitives. I spent a few days figuring out which 32 primitives we would have --- there are a lot of trade-offs because what we typically think of as being primitives can be defined in terms of each other --- so the question is which get defined in hardware and which get defined in software at a huge cost in performance. This bad idea was quickly dropped. Instead we went with a design in which the processor has a Harvard Architecture and there is a low-level machine-code that the primitives are written in. This was a much better idea. I wrote hundreds of primitives --- some I wrote by hand and some were generated by meta-compiling words (so I would have a lot of primitives that had only slight differences). I consider this system, with the low-level machine-language and the unlimited number of primitives, to be a much better design than the limited system with 32 primitives (or 64 primitives nowadays). Ilya says that he has done something similar, although I haven't seen it. OTOH, my Stundurd processor design was a limited system with a finite number of primitives. I don't know enough about HDL to say if it is a good design. I was assuming that it is difficult to have conditional execution within the primitives --- that was true in 1994 --- may not be true nowadays.
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| From | rickman <gnuarm@gmail.com> |
|---|---|
| Date | 2017-04-25 16:42 -0400 |
| Message-ID | <odoc4s$t9m$1@dont-email.me> |
| In reply to | #58136 |
On 4/25/2017 4:10 PM, hughaguilar96@gmail.com wrote: > > OTOH, my Stundurd processor design was a limited system with a finite > number of primitives. I don't know enough about HDL to say if it is a > good design. I was assuming that it is difficult to have conditional > execution within the primitives --- that was true in 1994 --- may not > be true nowadays. I have no idea why you say conditional execution within a primitive (instruction) would be difficult. If you mean that literally (the instruction is executed conditionally) that is *very* easy and would have been easy at literally any time in computer development other than perhaps in relay circuits (and maybe even then). Registers in a CPU enabled, that's how a CPU works, writing to some registers on some instructions and others in other instructions. But usually the enables are simple opcode decodes. For conditional jumps a mux selects the source of the address for the next instruction fetch rather than enabling a register since the next instruction address is typically incremented. But when it is another register that is enabled, the top of stack in an operation that is negating it for example, the register enable can be gated by whatever the condition code is. -- Rick C
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| From | Cecil Bayona <cbayona@cbayona.com> |
|---|---|
| Date | 2017-04-25 16:06 -0500 |
| Message-ID | <ododia$3ag$1@dont-email.me> |
| In reply to | #58140 |
On 4/25/2017 3:42 PM, rickman wrote: > On 4/25/2017 4:10 PM, hughaguilar96@gmail.com wrote: >> >> OTOH, my Stundurd processor design was a limited system with a finite >> number of primitives. I don't know enough about HDL to say if it is a >> good design. I was assuming that it is difficult to have conditional >> execution within the primitives --- that was true in 1994 --- may not >> be true nowadays. > > I have no idea why you say conditional execution within a primitive > (instruction) would be difficult. If you mean that literally (the > instruction is executed conditionally) that is *very* easy and would > have been easy at literally any time in computer development other than > perhaps in relay circuits (and maybe even then). Registers in a CPU > enabled, that's how a CPU works, writing to some registers on some > instructions and others in other instructions. But usually the enables > are simple opcode decodes. For conditional jumps a mux selects the > source of the address for the next instruction fetch rather than > enabling a register since the next instruction address is typically > incremented. But when it is another register that is enabled, the top > of stack in an operation that is negating it for example, the register > enable can be gated by whatever the condition code is. > I think you missed his point he is referring to a primitive that executes different things according to a set of conditions that is very difficult in a CPU that is trying to be simple and execute an instruction in one clock cycle. In a CPU where multiple clocks cycles are used to execute the instruction then that may not a major issue but a primitive Forth CPU with a single clock cycle to the instruction it would be difficult at best. -- Cecil - k5nwa
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| From | hughaguilar96@gmail.com |
|---|---|
| Date | 2017-04-25 14:25 -0700 |
| Message-ID | <be6e5f90-331b-4637-bf58-e5683612b87d@googlegroups.com> |
| In reply to | #58144 |
On Tuesday, April 25, 2017 at 2:06:19 PM UTC-7, Cecil - k5nwa wrote: > On 4/25/2017 3:42 PM, rickman wrote: > > On 4/25/2017 4:10 PM, hughaguilar96@gmail.com wrote: > >> > >> OTOH, my Stundurd processor design was a limited system with a finite > >> number of primitives. I don't know enough about HDL to say if it is a > >> good design. I was assuming that it is difficult to have conditional > >> execution within the primitives --- that was true in 1994 --- may not > >> be true nowadays. > > > > I have no idea why you say conditional execution within a primitive > > (instruction) would be difficult. If you mean that literally (the > > instruction is executed conditionally) that is *very* easy and would > > have been easy at literally any time in computer development other than > > perhaps in relay circuits (and maybe even then). Registers in a CPU > > enabled, that's how a CPU works, writing to some registers on some > > instructions and others in other instructions. But usually the enables > > are simple opcode decodes. For conditional jumps a mux selects the > > source of the address for the next instruction fetch rather than > > enabling a register since the next instruction address is typically > > incremented. But when it is another register that is enabled, the top > > of stack in an operation that is negating it for example, the register > > enable can be gated by whatever the condition code is. > > > I think you missed his point he is referring to a primitive that > executes different things according to a set of conditions that is very > difficult in a CPU that is trying to be simple and execute an > instruction in one clock cycle. In a CPU where multiple clocks cycles > are used to execute the instruction then that may not a major issue but > a primitive Forth CPU with a single clock cycle to the instruction it > would be difficult at best. Cecil is understanding my point. In the Stundurd I often have two primitive that do the same thing, but one expects only TOS to be valid and the other expects TOS and SOS to be valid. Popping SOS from the stack or pushing SOS to the stack is called "huffing" and "puffing" in my documentation (my documentation is somewhat light-hearted). I am effectively moving the complexity of huffing and puffing to the compiler to be done at compile-time --- this is instead of having this complexity built into the primitives and done at run-time (significantly complicating the HDL, I would expect). I have this in my document (note that FMITE is an old name for the Stundurd): =========================== section 19.5) an interesting suggestion Michael Barry says this: ----------------------------------------------------------------------------In the simplest FMITE, I believe there are two internal states for the parameter stack: huffed and puffed. If the FMITE keeps an internal flag that keeps track of this, it can insert a huff or puff automatically BEFORE the currently decoded instruction, but only if the current state is wrong for that particular instruction. Latency would be a maximum of a single huff or puff, and would usually be zero. By putting this atomic latency in its own clock slot (BEFORE the current instruction, not AFTER), the maximum clock speed wouldn't hardly suffer at all. All of your mnemonics that have a suffix like 01, 12, 21, could be consolidated into a single op-code and mnemonic with no suffix, because the cpu would know by the current state and the op-code it has just decoded whether or not it will have to insert a one cycle delay to huff or puff. HUFF01, HUFF12, and PUFF21 could be completely eliminated from the op-code matrix, because they would be internalized, and only used as dictated by the current instruction stream. There would be no need to worry about leaving the processor in any given huff/puff state after any instruction or exit (or interrupt, for that matter), because any necessary state changes would be handled by the cpu when the following instruction is fetched and decoded. I believe that some of the Burroughs mainframes were doing this 50 years ago, so it's a proven strategy. The best analogy that comes to mind is a manual transmission vs. an automatic: your assembly code examples expend a lot of effort to keep all the huffers and puffers in harmony by manually clutching and shifting gears (states) as needed. You don't have to upshift or downshift an automatic, you just put it in "drive" and let it decide the best gear for the circumstances. In my experience, it usually makes the most efficient choice for the given road (instruction stream), unless it's broken. And you don't have to worry about spilling your coffee or dropping your cigarette by having to reach for the gearshift in traffic. It should also be possible to get the compiler to recognize and favor more efficient sequences (like NIP DROP instead of DROP DROP, so the cpu doesn't have to work so hard automatically huffing and puffing). ---------------------------------------------------------------------------- Michael Barry is a professional auto-mechanic, which is presumably why his explanation concluded with an automobile analogy. As an historical note, Henry Ford originally wanted an automatic transmission because he didn't believe that the average American was capable of learning how to operate a clutch, and he expected that if only a manual transmission were offered then automobiles would only be purchased by "gear heads" (the term for technology enthusiasts in the early 20th century), whereas the common people would continue to use horses. Unfortunately, his engineers informed him that the automatic-transmission technology was not ready for prime-time yet, so he had to go with a manual transmission. The people managed, although 50 years later when automatic-transmissions were introduced everybody jumped on the technology as they apparently had had quite enough of spilling their coffee and dropping their cigarettes. Michael programs as a hobby, mostly in 6502 assembly language for retro computers from the 1980s. His idea is pretty good. There would be a one-bit register flag (lets call it SV for "SOS valid") that would be set to TRUE if SOS has the second-on-stack value in it or set to FALSE if SOS is invalid. Each primitive would set SV appropriately when it concluded. Most of the primitives would also examine SV before beginning, and either huff a datum into SOS or puff a datum out of SOS depending upon which they need. Some primitives, such as LIT-PLUS don't care if SOS is valid or not because they only work with TOS and so they would ignore SV and leave it as-is for the next primitive to worry about. The advantage of this scheme is that there would be fewer primitives needed to do the same thing as currently being done. Right now, there is a lot of redundancy such as SWAP12 and SWAP22 that essentially do the same thing, but are only different in regard to whether they expect SOS to be valid or not. All of these redundant primitives could be replaced with a single primitive, such as SWAP for SWAP12 and SWAP22. We still have 64 primitives total available though, so a lot of what currently are macros could become primitives --- for example, we could have a TUCK primitive (currently we have TUCK12 and TUCK22 macros, each expanding to two primitives). Also, a single primitive only takes up one byte, so it could fit in the skip-area of a skippy primitive along with another primitive, reducing the need to put a BRANCH in the skip-area and the code elsewhere. The overall program would be smaller --- reducing bloat could be an issue for big programs (we only have 32KB of non-volatile memory, and only 16KB of that is accessible by CALL) --- also, reducing bloat increases speed because less time is spent fetching and decoding opcodes. The disadvantage is that most of the primitives would be slower because they have to test SV before beginning and also set SV at the end. This likely won't make much of a difference in an FPGA. In an emulation however, it could make a big difference. The AVR is not too bad, because the T flag could be used as SV, but most processors (such as the MSP-430 or PIC24) would require a 16-bit register to be used for SV which is wasteful of resources (it might be possible to use the Carry flag, although you would have to be careful not to accidently clobber it in your NEXT code). Another disadvantage is that this scheme requires primitives to be able to branch internally (depending upon the state of SV at the beginning). My experience with the MiniForth, is that primitives can't branch internally --- I assume that this is very expensive to implement in an FPGA --- Mark Wills says that I'm thinking in terms of 20-year-old technology and that modern FPGAs are much more powerful and don't have this limitation. I'm not familiar enough with FPGAs to know if this is true or not (maybe it is only true for big expensive FPGAs but not for small inexpensive FPGAs). Right now, I'm sticking with the simple plan of having the huffing and puffing figured out at compile-time (the cross-compiler generates either SWAP12 or SWAP22 as appropriate). Michael's idea with this being done at run-time is something to consider though --- maybe a second version of the processor can do this.
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| From | rickman <gnuarm@gmail.com> |
|---|---|
| Date | 2017-04-25 17:52 -0400 |
| Message-ID | <odog95$b6i$1@dont-email.me> |
| In reply to | #58144 |
On 4/25/2017 5:06 PM, Cecil Bayona wrote: > On 4/25/2017 3:42 PM, rickman wrote: >> On 4/25/2017 4:10 PM, hughaguilar96@gmail.com wrote: >>> >>> OTOH, my Stundurd processor design was a limited system with a finite >>> number of primitives. I don't know enough about HDL to say if it is a >>> good design. I was assuming that it is difficult to have conditional >>> execution within the primitives --- that was true in 1994 --- may not >>> be true nowadays. >> >> I have no idea why you say conditional execution within a primitive >> (instruction) would be difficult. If you mean that literally (the >> instruction is executed conditionally) that is *very* easy and would >> have been easy at literally any time in computer development other >> than perhaps in relay circuits (and maybe even then). Registers in a >> CPU enabled, that's how a CPU works, writing to some registers on some >> instructions and others in other instructions. But usually the >> enables are simple opcode decodes. For conditional jumps a mux >> selects the source of the address for the next instruction fetch >> rather than enabling a register since the next instruction address is >> typically incremented. But when it is another register that is >> enabled, the top of stack in an operation that is negating it for >> example, the register enable can be gated by whatever the condition >> code is. >> > I think you missed his point he is referring to a primitive that > executes different things according to a set of conditions that is very > difficult in a CPU that is trying to be simple and execute an > instruction in one clock cycle. In a CPU where multiple clocks cycles > are used to execute the instruction then that may not a major issue but > a primitive Forth CPU with a single clock cycle to the instruction it > would be difficult at best. I've never seen any computer that conditionally executes multiple things in a single instruction such as IF AND ELSE OR THEN, have you? That's not hard to do, but it's pretty odd. I suppose it can be done, but why? It certainly doesn't require any more clock cycles than the functions themselves require. On the other hand the ARM processor has conditional instructions that provide exactly the capability I was discussing, individual functions being either executed or not in a given instruction. I had to look this up once and I don't recall the details, but ARM seems to have taken this to a high level with multiple instructions in sequence operating this way like a high level conditional structure. The advantage is it doesn't require a jump, so the pipeline doesn't need to be flushed. For short instruction sequences it is faster. Hugh's post says nothing like this actually. He just refers to it being "difficult to have conditional execution within the primitives". If you can extrapolate more out of that you are a better man than I. -- Rick C
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| From | rickman <gnuarm@gmail.com> |
|---|---|
| Date | 2017-04-23 00:18 -0400 |
| Message-ID | <odh9p6$3ta$1@dont-email.me> |
| In reply to | #57837 |
On 4/22/2017 2:48 PM, Clive Arthur wrote: > On 21/04/2017 23:55, rickman wrote: >> On 4/21/2017 3:49 AM, JUERGEN wrote: >>> see https://www.amazon.com/dp/B071D3XMPS and >>> https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is >>> running eForth on my desk in a low cost Lattice DevBoard and there has >>> been an ASIC implementation in the past already as google told me >> >> Does this processor have any particular purpose or advantage over other >> stack processors? >> > It seems it's small, but with a limited instruction set, so some simple > Forth words may take several clock cycles. For example, OR is made with > com pushr com popr and com, which I guess would be > > : or > not >r not r> and not > ; > > Looks a bit tedious, but maybe if you're pushed for space and speed > isn't everything... I'm not following. "Small" is pretty much par for the course for stack processors. Does "small" have a number associated with it? I wrote my own stack processor back in 2002 ball park. I worked on alternate designs over the years. I found much of what I had done was also done by others. There are any number of stack designs around that are well fleshed out and available for use. Each one has some advantage even if it only a small one. None are super stars, but nearly all can be implemented in a fairly small footprint. -- Rick C
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| From | Ilya Tarasov <ilya74.tarasov@gmail.com> |
|---|---|
| Date | 2017-04-22 13:28 -0700 |
| Message-ID | <5e89a95b-918a-4a91-828d-c314d0db02dc@googlegroups.com> |
| In reply to | #57698 |
пятница, 21 апреля 2017 г., 10:49:46 UTC+3 пользователь JUERGEN написал: > see https://www.amazon.com/dp/B071D3XMPS and https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is running eForth on my desk in a low cost Lattice DevBoard and there has been an ASIC implementation in the past already as google told me Like for many soft-core CPU, I see here a lack of system level modelling. Some solutions looks strange and no clear idea for programmer or system designer is stated.
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| From | JUERGEN <epldfpga@aol.com> |
|---|---|
| Date | 2017-04-23 05:06 -0700 |
| Message-ID | <e8eed5eb-5235-4aa5-94bb-4c93320001d4@googlegroups.com> |
| In reply to | #57844 |
On Saturday, April 22, 2017 at 9:28:34 PM UTC+1, Ilya Tarasov wrote: > пятница, 21 апреля 2017 г., 10:49:46 UTC+3 пользователь JUERGEN написал: > > see https://www.amazon.com/dp/B071D3XMPS and https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is running eForth on my desk in a low cost Lattice DevBoard and there has been an ASIC implementation in the past already as google told me > > Like for many soft-core CPU, I see here a lack of system level modelling. Some solutions looks strange and no clear idea for programmer or system designer is stated. Ilya, could you please point me to another better IP alternative, 32 bit, well documented at a price of $25 ( or even less? ). And with a Forth that runs on it. Thanks
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| From | Ilya Tarasov <ilya74.tarasov@gmail.com> |
|---|---|
| Date | 2017-04-23 06:38 -0700 |
| Message-ID | <7b379463-e38e-43fa-bfc4-5f46cb734993@googlegroups.com> |
| In reply to | #57899 |
воскресенье, 23 апреля 2017 г., 15:06:42 UTC+3 пользователь JUERGEN написал: > On Saturday, April 22, 2017 at 9:28:34 PM UTC+1, Ilya Tarasov wrote: > > пятница, 21 апреля 2017 г., 10:49:46 UTC+3 пользователь JUERGEN написал: > > > see https://www.amazon.com/dp/B071D3XMPS and https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is running eForth on my desk in a low cost Lattice DevBoard and there has been an ASIC implementation in the past already as google told me > > > > Like for many soft-core CPU, I see here a lack of system level modelling. Some solutions looks strange and no clear idea for programmer or system designer is stated. > > Ilya, could you please point me to another better IP alternative, 32 bit, well documented at a price of $25 ( or even less? ). And with a Forth that runs on it. Thanks Do you mean 25$ for ASIC, suitable FPGA or core license? And yes, 32 bit only? What about scalability to 64, 128? And maybe C support as well? :)
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| From | JUERGEN <epldfpga@aol.com> |
|---|---|
| Date | 2017-04-23 11:24 -0700 |
| Message-ID | <431ce4e6-0caa-4522-ae8c-00af8d244798@googlegroups.com> |
| In reply to | #57903 |
On Sunday, April 23, 2017 at 2:38:17 PM UTC+1, Ilya Tarasov wrote: > воскресенье, 23 апреля 2017 г., 15:06:42 UTC+3 пользователь JUERGEN написал: > > On Saturday, April 22, 2017 at 9:28:34 PM UTC+1, Ilya Tarasov wrote: > > > пятница, 21 апреля 2017 г., 10:49:46 UTC+3 пользователь JUERGEN написал: > > > > see https://www.amazon.com/dp/B071D3XMPS and https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is running eForth on my desk in a low cost Lattice DevBoard and there has been an ASIC implementation in the past already as google told me > > > > > > Like for many soft-core CPU, I see here a lack of system level modelling. Some solutions looks strange and no clear idea for programmer or system designer is stated. > > > > Ilya, could you please point me to another better IP alternative, 32 bit, well documented at a price of $25 ( or even less? ). And with a Forth that runs on it. Thanks > > Do you mean 25$ for ASIC, suitable FPGA or core license? > > And yes, 32 bit only? What about scalability to 64, 128? And maybe C support as well? :) There is an EP8, an EP16, the EP32 talked about here and as well an EP64. An alternative to EP32 would be of interest - scalable is a possibility - but from my side the additional Forth and running in a low cost FPGA Board is more important. I assume though, that 16 Bit might be the biggest market. Best would be a processor, where each Forth Word is VHDL, or as many as possible but I assume this is asked too much, but for the sake of it I assume it has been done - until the FPGA is full ...
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| From | Ilya Tarasov <ilya74.tarasov@gmail.com> |
|---|---|
| Date | 2017-04-23 12:17 -0700 |
| Message-ID | <c40ee0b7-ced4-4f99-b322-5e199cfed030@googlegroups.com> |
| In reply to | #57913 |
воскресенье, 23 апреля 2017 г., 21:24:14 UTC+3 пользователь JUERGEN написал: > On Sunday, April 23, 2017 at 2:38:17 PM UTC+1, Ilya Tarasov wrote: > > воскресенье, 23 апреля 2017 г., 15:06:42 UTC+3 пользователь JUERGEN написал: > > > On Saturday, April 22, 2017 at 9:28:34 PM UTC+1, Ilya Tarasov wrote: > > > > пятница, 21 апреля 2017 г., 10:49:46 UTC+3 пользователь JUERGEN написал: > > > > > see https://www.amazon.com/dp/B071D3XMPS and https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is running eForth on my desk in a low cost Lattice DevBoard and there has been an ASIC implementation in the past already as google told me > > > > > > > > Like for many soft-core CPU, I see here a lack of system level modelling. Some solutions looks strange and no clear idea for programmer or system designer is stated. > > > > > > Ilya, could you please point me to another better IP alternative, 32 bit, well documented at a price of $25 ( or even less? ). And with a Forth that runs on it. Thanks > > > > Do you mean 25$ for ASIC, suitable FPGA or core license? > > > > And yes, 32 bit only? What about scalability to 64, 128? And maybe C support as well? :) > > There is an EP8, an EP16, the EP32 talked about here and as well an EP64. An alternative to EP32 would be of interest - scalable is a possibility - but from my side the additional Forth and running in a low cost FPGA Board is more important. I assume though, that 16 Bit might be the biggest market. > Best would be a processor, where each Forth Word is VHDL, or as many as possible but I assume this is asked too much, but for the sake of it I assume it has been done - until the FPGA is full ... Near 2005 my team occasionally switch to my Forth-CPU for almost all projects. This happens because FPGA is cheaper than MCU+FPGA and Forth CPU is easy to use compared with Xilinx Microblaze. Of course, I cannot run Linux, but for most task in low-cost FPGA Forth is perfect. I count generations of 'mainstream' Forth CPUs. 5th gen is actual for now with 20+ projects completed. Here is hardware supported commands, you can see it is just a VHDL snippet. constant cmdNOP : integer := 0; constant cmdNOT : integer := 1; constant cmdFETCH : integer := 2; constant cmdSHL : integer := 3; constant cmdSHR : integer := 4; constant cmdSHRA : integer := 5; constant cmdINPORT : integer := 6; constant cmdSWAP : integer := 7; constant cmdDUP : integer := 8; constant cmdOVER : integer := 9; constant cmdFROMR : integer := 10; constant cmdLOOP : integer := 11; constant cmdSYSREG : integer := 12; constant cmdPLUS : integer := 13; constant cmdMINUS : integer := 14; constant cmdAND : integer := 15; constant cmdOR : integer := 16; constant cmdXOR : integer := 17; constant cmdEQUAL : integer := 18; constant cmdLESSER : integer := 19; constant cmdGREATER : integer := 20; constant cmdMULT : integer := 21; constant cmdDROP : integer := 22; constant cmdJMP : integer := 23; constant cmdCALL : integer := 24; constant cmdRJMP : integer := 25; constant cmdTOR : integer := 26; constant cmdSTORE : integer := 27; constant cmdDO : integer := 28; constant cmdRIF : integer := 29; constant cmdUNTIL : integer := 30; constant cmdRET : integer := 31; -------------------------------------- For my latest core (7th gen) goto for some pictures to http://fforum.winglion.ru/viewtopic.php?f=3&t=3104 From the 5th gen all cores are scalable by datawidth, so 8, 16, 32 or 64 (or 24 if you want) will not break schematic. I don't need 25$ FPGA for this, lowest cost Spartan-6LX4 (10$) is enough, with a half of space for user peripheral.
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| From | JUERGEN <epldfpga@aol.com> |
|---|---|
| Date | 2017-04-23 23:43 -0700 |
| Message-ID | <a622ba76-d858-40e2-aece-5bc1f2811925@googlegroups.com> |
| In reply to | #57917 |
On Sunday, April 23, 2017 at 8:17:19 PM UTC+1, Ilya Tarasov wrote: > воскресенье, 23 апреля 2017 г., 21:24:14 UTC+3 пользователь JUERGEN написал: > > On Sunday, April 23, 2017 at 2:38:17 PM UTC+1, Ilya Tarasov wrote: > > > воскресенье, 23 апреля 2017 г., 15:06:42 UTC+3 пользователь JUERGEN написал: > > > > On Saturday, April 22, 2017 at 9:28:34 PM UTC+1, Ilya Tarasov wrote: > > > > > пятница, 21 апреля 2017 г., 10:49:46 UTC+3 пользователь JUERGEN написал: > > > > > > see https://www.amazon.com/dp/B071D3XMPS and https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is running eForth on my desk in a low cost Lattice DevBoard and there has been an ASIC implementation in the past already as google told me > > > > > > > > > > Like for many soft-core CPU, I see here a lack of system level modelling. Some solutions looks strange and no clear idea for programmer or system designer is stated. > > > > > > > > Ilya, could you please point me to another better IP alternative, 32 bit, well documented at a price of $25 ( or even less? ). And with a Forth that runs on it. Thanks > > > > > > Do you mean 25$ for ASIC, suitable FPGA or core license? > > > > > > And yes, 32 bit only? What about scalability to 64, 128? And maybe C support as well? :) > > > > There is an EP8, an EP16, the EP32 talked about here and as well an EP64. An alternative to EP32 would be of interest - scalable is a possibility - but from my side the additional Forth and running in a low cost FPGA Board is more important. I assume though, that 16 Bit might be the biggest market. > > Best would be a processor, where each Forth Word is VHDL, or as many as possible but I assume this is asked too much, but for the sake of it I assume it has been done - until the FPGA is full ... > > Near 2005 my team occasionally switch to my Forth-CPU for almost all projects. This happens because FPGA is cheaper than MCU+FPGA and Forth CPU is easy to use compared with Xilinx Microblaze. Of course, I cannot run Linux, but for most task in low-cost FPGA Forth is perfect. > > I count generations of 'mainstream' Forth CPUs. 5th gen is actual for now with 20+ projects completed. Here is hardware supported commands, you can see it is just a VHDL snippet. > > constant cmdNOP : integer := 0; > > constant cmdNOT : integer := 1; > constant cmdFETCH : integer := 2; > constant cmdSHL : integer := 3; > constant cmdSHR : integer := 4; > constant cmdSHRA : integer := 5; > constant cmdINPORT : integer := 6; > > constant cmdSWAP : integer := 7; > > constant cmdDUP : integer := 8; > constant cmdOVER : integer := 9; > constant cmdFROMR : integer := 10; > constant cmdLOOP : integer := 11; > constant cmdSYSREG : integer := 12; > > constant cmdPLUS : integer := 13; > constant cmdMINUS : integer := 14; > constant cmdAND : integer := 15; > constant cmdOR : integer := 16; > constant cmdXOR : integer := 17; > constant cmdEQUAL : integer := 18; > constant cmdLESSER : integer := 19; > constant cmdGREATER : integer := 20; > constant cmdMULT : integer := 21; > > constant cmdDROP : integer := 22; > constant cmdJMP : integer := 23; > constant cmdCALL : integer := 24; > constant cmdRJMP : integer := 25; > constant cmdTOR : integer := 26; > > constant cmdSTORE : integer := 27; > constant cmdDO : integer := 28; > > constant cmdRIF : integer := 29; > constant cmdUNTIL : integer := 30; > > constant cmdRET : integer := 31; > -------------------------------------- > > For my latest core (7th gen) goto for some pictures to > http://fforum.winglion.ru/viewtopic.php?f=3&t=3104 > > From the 5th gen all cores are scalable by datawidth, so 8, 16, 32 or 64 (or 24 if you want) will not break schematic. > > I don't need 25$ FPGA for this, lowest cost Spartan-6LX4 (10$) is enough, with a half of space for user peripheral. Thanks Ilya. For me the easy core availability is important. From Ting you can buy the complete VHDL plus the eForth documentation for $25 - the Brevia or other is separate. We just used the Brevia as it is relatively low cost and a lot of external memory. What in comparison is the price of your VHDL and documentation in English - or is your product only for internal usage for your projects?
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| From | Ilya Tarasov <ilya74.tarasov@gmail.com> |
|---|---|
| Date | 2017-04-24 04:16 -0700 |
| Message-ID | <6b1b1376-665f-475a-b2b7-6b7081e142de@googlegroups.com> |
| In reply to | #57966 |
понедельник, 24 апреля 2017 г., 9:43:37 UTC+3 пользователь JUERGEN написал: > On Sunday, April 23, 2017 at 8:17:19 PM UTC+1, Ilya Tarasov wrote: > > воскресенье, 23 апреля 2017 г., 21:24:14 UTC+3 пользователь JUERGEN написал: > > > On Sunday, April 23, 2017 at 2:38:17 PM UTC+1, Ilya Tarasov wrote: > > > > воскресенье, 23 апреля 2017 г., 15:06:42 UTC+3 пользователь JUERGEN написал: > > > > > On Saturday, April 22, 2017 at 9:28:34 PM UTC+1, Ilya Tarasov wrote: > > > > > > пятница, 21 апреля 2017 г., 10:49:46 UTC+3 пользователь JUERGEN написал: > > > > > > > see https://www.amazon.com/dp/B071D3XMPS and https://wiki.forth-ev.de/doku.php/projects:ep32:start The core is running eForth on my desk in a low cost Lattice DevBoard and there has been an ASIC implementation in the past already as google told me > > > > > > > > > > > > Like for many soft-core CPU, I see here a lack of system level modelling. Some solutions looks strange and no clear idea for programmer or system designer is stated. > > > > > > > > > > Ilya, could you please point me to another better IP alternative, 32 bit, well documented at a price of $25 ( or even less? ). And with a Forth that runs on it. Thanks > > > > > > > > Do you mean 25$ for ASIC, suitable FPGA or core license? > > > > > > > > And yes, 32 bit only? What about scalability to 64, 128? And maybe C support as well? :) > > > > > > There is an EP8, an EP16, the EP32 talked about here and as well an EP64. An alternative to EP32 would be of interest - scalable is a possibility - but from my side the additional Forth and running in a low cost FPGA Board is more important. I assume though, that 16 Bit might be the biggest market. > > > Best would be a processor, where each Forth Word is VHDL, or as many as possible but I assume this is asked too much, but for the sake of it I assume it has been done - until the FPGA is full ... > > > > Near 2005 my team occasionally switch to my Forth-CPU for almost all projects. This happens because FPGA is cheaper than MCU+FPGA and Forth CPU is easy to use compared with Xilinx Microblaze. Of course, I cannot run Linux, but for most task in low-cost FPGA Forth is perfect. > > > > I count generations of 'mainstream' Forth CPUs. 5th gen is actual for now with 20+ projects completed. Here is hardware supported commands, you can see it is just a VHDL snippet. > > > > constant cmdNOP : integer := 0; > > > > constant cmdNOT : integer := 1; > > constant cmdFETCH : integer := 2; > > constant cmdSHL : integer := 3; > > constant cmdSHR : integer := 4; > > constant cmdSHRA : integer := 5; > > constant cmdINPORT : integer := 6; > > > > constant cmdSWAP : integer := 7; > > > > constant cmdDUP : integer := 8; > > constant cmdOVER : integer := 9; > > constant cmdFROMR : integer := 10; > > constant cmdLOOP : integer := 11; > > constant cmdSYSREG : integer := 12; > > > > constant cmdPLUS : integer := 13; > > constant cmdMINUS : integer := 14; > > constant cmdAND : integer := 15; > > constant cmdOR : integer := 16; > > constant cmdXOR : integer := 17; > > constant cmdEQUAL : integer := 18; > > constant cmdLESSER : integer := 19; > > constant cmdGREATER : integer := 20; > > constant cmdMULT : integer := 21; > > > > constant cmdDROP : integer := 22; > > constant cmdJMP : integer := 23; > > constant cmdCALL : integer := 24; > > constant cmdRJMP : integer := 25; > > constant cmdTOR : integer := 26; > > > > constant cmdSTORE : integer := 27; > > constant cmdDO : integer := 28; > > > > constant cmdRIF : integer := 29; > > constant cmdUNTIL : integer := 30; > > > > constant cmdRET : integer := 31; > > -------------------------------------- > > > > For my latest core (7th gen) goto for some pictures to > > http://fforum.winglion.ru/viewtopic.php?f=3&t=3104 > > > > From the 5th gen all cores are scalable by datawidth, so 8, 16, 32 or 64 (or 24 if you want) will not break schematic. > > > > I don't need 25$ FPGA for this, lowest cost Spartan-6LX4 (10$) is enough, with a half of space for user peripheral. > > Thanks Ilya. For me the easy core availability is important. From Ting you can buy the complete VHDL plus the eForth documentation for $25 - the Brevia or other is separate. We just used the Brevia as it is relatively low cost and a lot of external memory. > What in comparison is the price of your VHDL and documentation in English - or is your product only for internal usage for your projects? I'm not too optimistic about this business model. From my point of view, I can spend a lot of time explaining why I did a certain part by certain way. I suppose this is a reason why Xilinx don't provide sources for Microblaze CPU. Many aspects of FPGA RTL coding are not so clear and trade-offs should be made. However, some users want to 'optimize' Microblaze, even if their optimization is worse from system view. I see the same situation with Forth and Forth CPU. Many peoples ask me for opening my Quark Forth sources. When I ask them 'why do you want it?', they telling me stories about optimization, promotion by team, ANS compatibility etc. - but not about their projects. It is better to explain them how to write and optimized Forth and continue to live with it. Similarly, I prefer to provide a methodology of custom CPU design rather than just throwing a large portion of VHDL to Internet and waiting for followers. If you have, say, Avnet Microboard or other popular Xilinx board, I can generate a bitstream for you. Now I can see prices for Xilinx are half with comparable logic density. If you have a project, I prefer to give you bitstream for free and see what happens. 25$ is not a money I'm worried about :)
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