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Groups > comp.lang.c++ > #83361
| From | scott@slp53.sl.home (Scott Lurndal) |
|---|---|
| Subject | Re: speed of unaligned accesses that cross page-boundaries |
| Newsgroups | comp.lang.c++ |
| References | <t17mqk$cj4$1@dont-email.me> <t1947l$1jv3$2@gioia.aioe.org> <mj0_J.321728$Rza5.183381@fx47.iad> |
| Message-ID | <fa2_J.255665$mF2.13892@fx11.iad> (permalink) |
| Organization | UsenetServer - www.usenetserver.com |
| Date | 2022-03-21 16:59 +0000 |
scott@slp53.sl.home (Scott Lurndal) writes: >Juha Nieminen <nospam@thanks.invalid> writes: >>Bonita Montero <Bonita.Montero@gmail.com> wrote: >>> I just wanted to measure the performance of unaligned accesses. >>> For accesses within a page the difference was below the measurement >>> error. Then I read that some processors put a penalty on unaligned >>> accesses that cross page-boundaries. So I wrote a little benchmark >>> that tries to measure this. But for my PCs, a Ryzen Threadripper >>> 3990X, a Ryzen 7 1800X and a Phenom X4 945 all measurements were >>> also within the measurement error. >> >>IIRC both Intel and AMD got rid of the unaligned access penalty >>at some point (relatively recently). You would need an older CPU >>in order to get the penalty. > >The barrel shifter penalty is gone. However, it is unavoidable >that such an access will need to access _two_ L1D cache lines, and >the hardware thread/core cannot do both accesses in parallel. Note that >Load-to-use penalties on x86 processors are about 4 clocks when >they hit in L1D. Much of that additional latency will be hidden >by out-of-order execution, unless there is an immediate dependency >upon the value loaded. Clock Operation ----- ----------------- 1 CAM the VA against the L1D TLB to get the PA [Assumes TLB hit] 2 Using bits from the PA to select the set, CAM the ways [Assumes L1D hit] 3 Load the data from SRAM onto the core bus. 4 load the data from the core bus into the register This needs to be done for both cache lines, sequentially. Now, given that BM is using the C++ compiler, it is likely the compiler is hoisting the load and/or reordering instructions to cover that expected latency. Adding in the cores out-of-order execution, I doubt that BM can derive any valid latency information relative to misaligned cache/page crossing accesses using C++. Note that an access that crosses a page boundary must by definition also cross a cache line boundary.
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speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-03-20 18:04 +0100
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-03-20 18:08 +0100
Re: speed of unaligned accesses that cross page-boundaries scott@slp53.sl.home (Scott Lurndal) - 2022-03-20 18:12 +0000
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-03-20 19:36 +0100
Re: speed of unaligned accesses that cross page-boundaries "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2022-03-20 16:13 -0700
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-03-21 06:58 +0100
Re: speed of unaligned accesses that cross page-boundaries scott@slp53.sl.home (Scott Lurndal) - 2022-03-21 14:49 +0000
Re: speed of unaligned accesses that cross page-boundaries Juha Nieminen <nospam@thanks.invalid> - 2022-03-21 05:59 +0000
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-03-21 08:56 +0100
Re: speed of unaligned accesses that cross page-boundaries scott@slp53.sl.home (Scott Lurndal) - 2022-03-21 14:53 +0000
Re: speed of unaligned accesses that cross page-boundaries scott@slp53.sl.home (Scott Lurndal) - 2022-03-21 16:59 +0000
Re: speed of unaligned accesses that cross page-boundaries Tim Rentsch <tr.17687@z991.linuxsc.com> - 2022-04-18 20:59 -0700
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-04-19 06:45 +0200
Re: speed of unaligned accesses that cross page-boundaries Juha Nieminen <nospam@thanks.invalid> - 2022-04-19 12:51 +0000
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-04-19 15:17 +0200
Re: speed of unaligned accesses that cross page-boundaries scott@slp53.sl.home (Scott Lurndal) - 2022-04-19 14:11 +0000
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-04-19 16:15 +0200
Re: speed of unaligned accesses that cross page-boundaries "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2022-04-27 01:52 -0700
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-04-27 20:02 +0200
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-04-28 08:19 +0200
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-04-28 12:19 +0200
Re: speed of unaligned accesses that cross page-boundaries "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2022-04-28 16:00 -0700
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-04-29 05:52 +0200
Re: speed of unaligned accesses that cross page-boundaries "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2022-05-04 18:06 -0700
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-05-05 06:13 +0200
Re: speed of unaligned accesses that cross page-boundaries "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2022-05-04 21:27 -0700
Re: speed of unaligned accesses that cross page-boundaries Bonita Montero <Bonita.Montero@gmail.com> - 2022-05-05 07:37 +0200
Re: speed of unaligned accesses that cross page-boundaries Öö Tiib <ootiib@hot.ee> - 2022-05-05 04:34 -0700
Re: speed of unaligned accesses that cross page-boundaries "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2022-05-05 12:16 -0700
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