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Re: Architecture / Instruction Set / Language co-design.

Started byMark Thorson <nospam@sonic.net>
First post2011-07-18 14:26 -0800
Last post2011-07-20 01:10 -0500
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  Re: Architecture / Instruction Set / Language co-design. Mark Thorson <nospam@sonic.net> - 2011-07-18 14:26 -0800
    Re: Architecture / Instruction Set / Language co-design. Charles Richmond <plano.net@aquaporin4.com> - 2011-07-20 01:10 -0500

#204 — Re: Architecture / Instruction Set / Language co-design.

FromMark Thorson <nospam@sonic.net>
Date2011-07-18 14:26 -0800
SubjectRe: Architecture / Instruction Set / Language co-design.
Message-ID<11-07-028@comp.compilers>
Roberto Waltman wrote:
>
> Recently I've become (very) interested in Wirth's Lilith/Modula-2
> workstation, which leads me to ask:
>
> What other systems were developed in a similar fashion?
>
> That is, to support mainly one language with the language guiding the
> architectural design.

It could be argued that the National Semiconductor NS16032 (later
renamed NS32016) qualifies.  The designers Les Kohn and Dan O'Dowd
started with an instruction set more-or-less based on the VAX and
pared it down to what they considered a minimum.  Dan wrote a Pascal
compiler that guided the design of the architecture in the sense that
every time the chip designers in Israel asked whether they could
delete a feature Les would turn to Dan and ask how that would affect
the compiler.  That chip was intended to be a general-purpose
architecture, but the compiler guided decisions on what features were
important.

Four instructions were deleted relatively late in the design process,
and you can see the places where they would have been if you look at
any early 32000 family die.  There are four clear stripes that span
the microcode ROM.  I believe these are visible on all 32000 family
devices through the NS32332.  If I remember correctly, the CPU was
reimplemented in the NS32532, at which point the stripes disappeared.

[Too bad they didn't have time to debug the chip before they shipped
it.  The NS chips, at least the early ones, were so buggy as to be
almost unusable. -John]

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#209

FromCharles Richmond <plano.net@aquaporin4.com>
Date2011-07-20 01:10 -0500
Message-ID<11-07-033@comp.compilers>
In reply to#204
On 7/18/11 5:26 PM, Mark Thorson wrote:
> It could be argued that the National Semiconductor NS16032 (later
> renamed NS32016) qualifies.  The designers Les Kohn and Dan O'Dowd
> started with an instruction set more-or-less based on the VAX and
> pared it down to what they considered a minimum.  Dan wrote a Pascal
> compiler that guided the design of the architecture in the sense that
> every time the chip designers in Israel asked whether they could
> delete a feature Les would turn to Dan and ask how that would affect
> the compiler.  That chip was intended to be a general-purpose
> architecture, but the compiler guided decisions on what features were
> important.
>
> Four instructions were deleted relatively late in the design process,
> and you can see the places where they would have been if you look at
> any early 32000 family die.  There are four clear stripes that span
> the microcode ROM.  I believe these are visible on all 32000 family
> devices through the NS32332.  If I remember correctly, the CPU was
> reimplemented in the NS32532, at which point the stripes disappeared.
>
> [Too bad they didn't have time to debug the chip before they shipped
> it.  The NS chips, at least the early ones, were so buggy as to be
> almost unusable. -John]

Yes, I was very interested in the instruction descriptions for the
NS32016.  Seems it had a "CASE" assembly language instruction.
But I heard that the chip had hardware problems that were *never*
worked out...  Too bad.

--
+----------------------------------------+
|     Charles and Francis Richmond       |
|                                        |
|  plano dot net at aquaporin4 dot com   |
+----------------------------------------+

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