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Re: optimizing compilers for low power design

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Kaz Kylheku wrote:

> On 2014-06-15, idatarm@gmail.com <idatarm@gmail.com> wrote:
> >   Abstract: We describe an algorithm for optimizing compilers for low
> >   power design. The algorithm can be applied to almost any c compiler
> >   and in particular we target gcc compiler. The algorithm works by
> >   modifying optimization table lookup of gcc.  This works in theory. We
>
> Instructions do not have a fixed power cost which can be measured by
> repeating a long run of that instruction and then dividing.
> It depends on their operands, and the complex state of the CPU (what
> other instructions are in the pipeline before and after, caching, etc).
> This approach might work on a very old processor, on which every instruction
> had a predictable instruction count. ...

> The best way to save power is to just optimize for overall execution time, to
> reduce how long the CPU has to be active. ...

A long time ago we wrote a compiler that optimized for minimum power
consumption. The application was a data logger that needed to be run
on battery power for about 14 months unattended. In what can basically
be described as a bad environment.

We did several things.

1) In the absence of hard data we modelled the processor instruction
set on the number of memory access to ROM and the two types of RAM we had
available.
The RAM was a block of RAM internal to the processor and external memory.

2) The external memory could be significantly powered down into a sleep mode
where it retained information but could no be accessed. The external RAM mode
was processor controlled.

3) The processor had a sleep mode that we eventually did not use. We added
a clock chip that was set up to power up and reset the processor. The processor
internal memory could be set-up to retain information.

4) There are a lot of non processor items that we also did. Unused inputs and
outputs we put into their lowest power mode. Pull-ups and pull down resistors
were all evaluated for their effect on power consumption.

5) As Derek Jones pointed out I/O transitions cost power we counted them
and brought the number out as static metric

5) Processor clock speed was a complex combination of time needed to
execute and on time for the rest of the electronics.

6) The compiler looked at alternative sequences and the power resources they
used. (Different from optimization of the instruction set in this was more data
flow optimization) It looked at minimizing the total time needed for the external
memory for example.

7) Software design played a major role. When this project was first developed
it would run for between 2 and 3 months. In the end after what was essentially
all software changes it was reliably running for 16 months.

w..

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optimizing compilers for low power design idatarm@gmail.com - 2014-06-15 05:20 -0700
  Re: optimizing compilers for low power design Kaz Kylheku <kaz@kylheku.com> - 2014-06-15 15:43 +0000
    Re: optimizing compilers for low power design Ivan Godard <ivan@ootbcomp.com> - 2014-06-15 11:19 -0700
    Re: optimizing compilers for low power design <Pidgeot18@verizon.com.invalid> - 2014-06-15 18:58 -0500
    Re: optimizing compilers for low power design "Derek M. Jones" <derek@_NOSPAM_knosof.co.uk> - 2014-06-16 12:11 +0100
      Re: optimizing compilers for low power design George Neuner <gneuner2@comcast.net> - 2014-06-18 04:44 -0400
        Re: optimizing compilers for low power design glen herrmannsfeldt <gah@ugcs.caltech.edu> - 2014-06-20 18:13 +0000
        Re: optimizing compilers for low power design Ivan Godard <ivan@ootbcomp.com> - 2014-06-20 11:52 -0700
        Re: optimizing compilers for low power design Gene Wirchenko <genew@telus.net> - 2014-06-20 12:16 -0700
        Re: optimizing compilers for low power design George Neuner <gneuner2@comcast.net> - 2014-06-20 17:24 -0400
    Re: optimizing compilers for low power design Walter Banks <walter@bytecraft.com> - 2014-06-16 13:30 -0400
  Re: optimizing compilers for low power design andrewchamberss@gmail.com - 2014-06-20 05:03 -0700

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