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The Seymour Cray Era of Supercomputers

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  The Seymour Cray Era of Supercomputers Thomas Koenig <tkoenig@netcologne.de> - 2025-05-17 20:00 +0000
    Re: The Seymour Cray Era of Supercomputers mitchalsup@aol.com (MitchAlsup1) - 2025-05-17 21:27 +0000
      Re: The Seymour Cray Era of Supercomputers Thomas Koenig <tkoenig@netcologne.de> - 2025-05-18 05:46 +0000
        Re: The Seymour Cray Era of Supercomputers Michael S <already5chosen@yahoo.com> - 2025-05-18 18:23 +0300
          Re: The Seymour Cray Era of Supercomputers mitchalsup@aol.com (MitchAlsup1) - 2025-05-18 22:02 +0000
          Re: The Seymour Cray Era of Supercomputers quadibloc <quadibloc@gmail.com> - 2025-05-19 01:08 +0000
            Re: The Seymour Cray Era of Supercomputers Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-19 01:56 +0000
              Re: The Seymour Cray Era of Supercomputers quadibloc <quadibloc@gmail.com> - 2025-05-19 03:12 +0000
                OoO execution (was: The Seymour Cray Era of Supercomputers) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2025-05-19 06:22 +0000
                  Re: OoO execution (was: The Seymour Cray Era of Supercomputers) John Levine <johnl@taugh.com> - 2025-05-19 17:10 +0000
                    Re: OoO execution (was: The Seymour Cray Era of Supercomputers) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2025-05-19 17:46 +0000
                      Re: OoO execution ze@zerandconsulting.com (Ze) - 2025-05-19 19:09 +0000
                        Re: OoO execution Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-20 00:04 +0000
                          Re: OoO execution mitchalsup@aol.com (MitchAlsup1) - 2025-05-20 00:30 +0000
                            Re: OoO execution scott@slp53.sl.home (Scott Lurndal) - 2025-05-20 13:52 +0000
                      Re: OoO execution (was: The Seymour Cray Era of Supercomputers) George Neuner <gneuner2@comcast.net> - 2025-05-21 12:52 -0400
                        Re: OoO execution Stefan Monnier <monnier@iro.umontreal.ca> - 2025-05-21 13:14 -0400
                        Re: OoO execution moi <findlaybill@blueyonder.co.uk> - 2025-05-21 18:47 +0100
                  Re: OoO execution EricP <ThatWouldBeTelling@thevillage.com> - 2025-05-19 14:33 -0400
                  Re: OoO execution quadibloc <quadibloc@gmail.com> - 2025-05-19 19:08 +0000
                    Re: OoO execution Terje Mathisen <terje.mathisen@tmsw.no> - 2025-05-19 22:04 +0200
                      Re: OoO execution Michael S <already5chosen@yahoo.com> - 2025-05-19 23:27 +0300
                      Re: OoO execution John Savard <quadibloc@invalid.invalid> - 2025-07-16 14:27 +0000
                        Re: OoO execution mitchalsup@aol.com (MitchAlsup1) - 2025-07-16 18:27 +0000
                          Re: OoO execution Stefan Monnier <monnier@iro.umontreal.ca> - 2025-07-16 17:45 -0400
                          Re: OoO execution Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-07-26 02:45 +0000
                            Re: OoO execution John Savard <quadibloc@invalid.invalid> - 2025-07-31 20:38 +0000
                              Re: OoO execution Michael S <already5chosen@yahoo.com> - 2025-08-01 15:02 +0300
                                Re: OoO execution John Levine <johnl@taugh.com> - 2025-08-01 15:44 +0000
                  Re: OoO execution (was: The Seymour Cray Era of Supercomputers) Michael S <already5chosen@yahoo.com> - 2025-05-19 23:41 +0300
                    Re: OoO execution (was: The Seymour Cray Era of Supercomputers) Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-20 00:01 +0000
                    Re: OoO execution (was: The Seymour Cray Era of Supercomputers) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2025-05-20 21:21 +0000
                      Re: OoO execution (was: The Seymour Cray Era of Supercomputers) Michael S <already5chosen@yahoo.com> - 2025-05-30 13:28 +0300
                        Re: OoO execution (was: The Seymour Cray Era of Supercomputers) Al Kossow <aek@bitsavers.org> - 2025-05-30 10:51 -0700
                          Re: OoO execution (was: The Seymour Cray Era of Supercomputers) scott@slp53.sl.home (Scott Lurndal) - 2025-05-30 19:36 +0000
                            Re: OoO execution (was: The Seymour Cray Era of Supercomputers) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2025-05-31 07:57 +0000
                          Re: OoO execution (was: The Seymour Cray Era of Supercomputers) Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-30 22:05 +0000
                            Re: OoO execution mitchalsup@aol.com (MitchAlsup1) - 2025-05-30 23:01 +0000
                        Re: OoO execution (was: The Seymour Cray Era of Supercomputers) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2025-05-31 08:10 +0000
                  Re: OoO execution (was: The Seymour Cray Era of Supercomputers) Thomas Koenig <tkoenig@netcologne.de> - 2025-05-29 19:02 +0000
                    Re: OoO execution mitchalsup@aol.com (MitchAlsup1) - 2025-05-29 20:06 +0000
                      Re: OoO execution Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-29 22:20 +0000
                      Re: OoO execution David Schultz <david.schultz@earthlink.net> - 2025-05-29 18:36 -0500
                Re: The Seymour Cray Era of Supercomputers Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-19 07:50 +0000
              Re: The Seymour Cray Era of Supercomputers Michael S <already5chosen@yahoo.com> - 2025-05-19 16:55 +0300
                Re: The Seymour Cray Era of Supercomputers Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-19 23:58 +0000
                  Re: The Seymour Cray Era of Supercomputers Michael S <already5chosen@yahoo.com> - 2025-05-20 13:45 +0300
                    Re: The Seymour Cray Era of Supercomputers mitchalsup@aol.com (MitchAlsup1) - 2025-05-20 16:59 +0000
                    Re: The Seymour Cray Era of Supercomputers John Levine <johnl@taugh.com> - 2025-05-20 19:59 +0000
                      Re: The Seymour Cray Era of Supercomputers mitchalsup@aol.com (MitchAlsup1) - 2025-05-20 22:48 +0000
                      Re: The Seymour Cray Era of Supercomputers Michael S <already5chosen@yahoo.com> - 2025-05-21 11:21 +0300
                        Re: The Seymour Cray Era of Supercomputers Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-21 08:44 +0000
                        Re: The Seymour Cray Era of Supercomputers John Levine <johnl@taugh.com> - 2025-05-21 16:09 +0000
                          Re: The Seymour Cray Era of Supercomputers Michael S <already5chosen@yahoo.com> - 2025-05-21 20:11 +0300
                            Re: The Seymour Cray Era of Supercomputers John Levine <johnl@taugh.com> - 2025-05-21 20:04 +0000
                          Re: The Seymour Cray Era of Supercomputers Lars Poulsen <lars@cleo.beagle-ears.com> - 2025-05-25 21:08 +0000
                            Re: 360/44, The Seymour Cray Era of Supercomputers John Levine <johnl@taugh.com> - 2025-05-25 22:50 +0000
      Re: The Seymour Cray Era of Supercomputers Michael S <already5chosen@yahoo.com> - 2025-05-18 11:33 +0300
        Re: The Seymour Cray Era of Supercomputers mitchalsup@aol.com (MitchAlsup1) - 2025-05-18 22:01 +0000
          Re: The Seymour Cray Era of Supercomputers Michael S <already5chosen@yahoo.com> - 2025-05-19 16:35 +0300
            Re: The Seymour Cray Era of Supercomputers Al Kossow <aek@bitsavers.org> - 2025-05-19 09:49 -0700
            Re: The Seymour Cray Era of Supercomputers mitchalsup@aol.com (MitchAlsup1) - 2025-05-19 18:14 +0000
              Re: The Seymour Cray Era of Supercomputers Michael S <already5chosen@yahoo.com> - 2025-05-19 23:11 +0300
                Re: The Seymour Cray Era of Supercomputers BGB <cr88192@gmail.com> - 2025-05-20 01:36 -0500
              Re: The Seymour Cray Era of Supercomputers Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-20 05:40 +0000
                Re: The Seymour Cray Era of Supercomputers mitchalsup@aol.com (MitchAlsup1) - 2025-05-20 16:58 +0000
                  Re: The Seymour Cray Era of Supercomputers Lawrence D'Oliveiro <ldo@nz.invalid> - 2025-05-21 00:28 +0000
              Re: The Seymour Cray Era of Supercomputers "Brian G. Lucas" <bagel99@gmail.com> - 2025-05-26 11:48 -0500
                Re: The Seymour Cray Era of Supercomputers mitchalsup@aol.com (MitchAlsup1) - 2025-05-26 18:01 +0000
                  Re: The Seymour Cray Era of Supercomputers EricP <ThatWouldBeTelling@thevillage.com> - 2025-05-26 16:52 -0400
                    Re: The Seymour Cray Era of Supercomputers Al Kossow <aek@bitsavers.org> - 2025-05-26 19:27 -0700

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#111651 — Re: OoO execution

quadibloc wrote:
> On Mon, 19 May 2025 6:22:42 +0000, Anton Ertl wrote:
> 
>> You are probably thinking of OoO Execution, where people usually write
>> as if the Tomasulo algorithm of the 360/91 as implemented the modern
>> concept of OoO execution.  But the 360/91 only did OoO for FP, did not
>> support branch prediction, had imprecise exceptions, and the Tomasulo
>> algorithm was used primarily as a workaround for the dearth of FP
>> registers in the S/360.
> 
> Yes, I was thinking of OoO execution, as opposed to other forms of
> pipelining - basic pipelining was used in the 7094 II and even the 6502.
> 
> The Pentium II (and Pentium Pro) also only used OoO for floating-point,
> while the 68050 only used OoO for integers!

Huh???

The Pentium (all versions) had two pipes (u & v), both in-order, and 
with severe limitations on which opcodes could run in v in parallel with 
the primary opcode in the u pipe.

The P6/PentiumPro OTOH does true OoO for all instruction types.

John, you are usually much better informed!

Terje


-- 
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"

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#111653 — Re: OoO execution

On Mon, 19 May 2025 22:04:22 +0200
Terje Mathisen <terje.mathisen@tmsw.no> wrote:

> 
> John, you are usually much better informed!
> 

I don't think so. John is as uninformed as usual.
I think, he is repeating this particular bit of nonsense about PPro at
least for the 3rd time and every single time he was corrected.

> Terje
> 
> 

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#112584 — Re: OoO execution

On Mon, 19 May 2025 22:04:22 +0200, Terje Mathisen wrote:
> quadibloc wrote:

>> The Pentium II (and Pentium Pro) also only used OoO for floating-point,
>> while the 68050 only used OoO for integers!
> 
> Huh???
> 
> The Pentium (all versions) had two pipes (u & v), both in-order, and
> with severe limitations on which opcodes could run in v in parallel with
> the primary opcode in the u pipe.
> 
> The P6/PentiumPro OTOH does true OoO for all instruction types.
> 
> John, you are usually much better informed!

I had read somewhere that the Pentium Pro and the Pentium II, like the 
System/360 Model 91, were OoO only in their floating-point pipelines. If 
that source was faulty, and better sources say differently, I'll need to 
check on it.

John Savard

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#112589 — Re: OoO execution

On Wed, 16 Jul 2025 14:27:11 +0000, John Savard wrote:

> On Mon, 19 May 2025 22:04:22 +0200, Terje Mathisen wrote:
>> quadibloc wrote:
>
>>> The Pentium II (and Pentium Pro) also only used OoO for floating-point,
>>> while the 68050 only used OoO for integers!
>>
>> Huh???
>>
>> The Pentium (all versions) had two pipes (u & v), both in-order, and
>> with severe limitations on which opcodes could run in v in parallel with
>> the primary opcode in the u pipe.
>>
>> The P6/PentiumPro OTOH does true OoO for all instruction types.
>>
>> John, you are usually much better informed!
>
> I had read somewhere that the Pentium Pro and the Pentium II, like the
> System/360 Model 91, were OoO only in their floating-point pipelines. If
> that source was faulty, and better sources say differently, I'll need to
> check on it.

The Anderson papers indicate the /91 was just heavily pipelined in
the integer side.

I don't know about PPro in the integer section, but it was definitely
OoO in branches, the memory section, and in the PFU. So, I don't see
why they would not have had integer OoO.

>
> John Savard

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#112590 — Re: OoO execution

> I don't know about PPro in the integer section, but it was definitely
> OoO in branches, the memory section, and in the PFU. So, I don't see
> why they would not have had integer OoO.

For the /91 I can see some potential simplifications to keep some parts
in-order, but for the PPro it seems to me that the requirements of
precise-exceptions make it so having some parts OoO and some parts
in-order wouldn't give much benefits (if any).


        Stefan

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#112736 — Re: OoO execution

On Wed, 16 Jul 2025 18:27:38 +0000, MitchAlsup1 wrote:

> The Anderson papers indicate the /91 was just heavily pipelined in the
> integer side.

Not good enough to keep up with CDC?

After about two years of promising that they would blow CDC out of the 
water ...

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#112792 — Re: OoO execution

On Sat, 26 Jul 2025 02:45:56 +0000, Lawrence D'Oliveiro wrote:

> Not good enough to keep up with CDC?
> 
> After about two years of promising that they would blow CDC out of the
> water ...

The IBM System/360 Model 91 wasn't even good enough to keep up with the
Model 85.

However, IBM still realized that OoO was useful, even if it delivered less
than the promised improvement in performance. So they went on to the
Model 195 which added cache to the Model 91 design. That did work well
enough that *I think* it actually did out-perform the CDC machines of the
time.

Even if it didn't, it performed well, and could have been considered a
superior alternative - the CDC 6600 had reliabillity problems, I remember
reading. So it would only have had to come close to the 7600 or whatever
CDC had at the time in such a situation.

John Savard

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#112798 — Re: OoO execution

On Thu, 31 Jul 2025 20:38:38 -0000 (UTC)
John Savard <quadibloc@invalid.invalid> wrote:

> On Sat, 26 Jul 2025 02:45:56 +0000, Lawrence D'Oliveiro wrote:
> 
> > Not good enough to keep up with CDC?
> > 
> > After about two years of promising that they would blow CDC out of
> > the water ...  
> 
> The IBM System/360 Model 91 wasn't even good enough to keep up with
> the Model 85.
> 
> However, IBM still realized that OoO was useful, even if it delivered
> less than the promised improvement in performance. So they went on to
> the Model 195 which added cache to the Model 91 design. That did work
> well enough that *I think* it actually did out-perform the CDC
> machines of the time.
>

From what I see in Wkipedia, it looks like all "number-crunching
oriented" S/360 Models, i.e. 85, 91 and 195, were failures from
business POV, even if to slightly different degrees (85 less bad).
May be, S/370 Model 195 was more successful, I was not able to find info
about number of units shipped.

But, then again, CDC 7600, despite its excellent performance, was
significantly less successful commercially than 6600. So, may be, it was
just a bad era for that type of machines.

> Even if it didn't, it performed well, and could have been considered a
> superior alternative - the CDC 6600 had reliabillity problems, I
> remember reading. So it would only have had to come close to the 7600
> or whatever CDC had at the time in such a situation.
> 
> John Savard

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#112801 — Re: OoO execution

According to Michael S  <already5chosen@yahoo.com>:
>From what I see in Wkipedia, it looks like all "number-crunching
>oriented" S/360 Models, i.e. 85, 91 and 195, were failures from
>business POV, even if to slightly different degrees (85 less bad).
>May be, S/370 Model 195 was more successful, I was not able to find info
>about number of units shipped.

Neither can I but I don't think it was very many.

The /91 was a very unbalanced machine.  For general computing
like compilers it was about the same speed as the /85, but
for floating point codes it was twice as fast or more depending
on how well the code was tuned to the /91.

The IBM history book says the /85 was a technical success largely
due to the cache but didn't sell well, partly due to poor economic
conditions, partly because customers wanted something faster and
cheaper built using integrated circuits.

-- 
Regards,
John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. https://jl.ly

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#111654 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

On Mon, 19 May 2025 06:22:42 GMT
anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:

> 
> The innovation that made OoO execution generally usable rather than a
> publicity stunt like the 360/91 is the reorder buffer (ROB), which
> allows to retire the instructions in-order, and to cancel
> speculatively "executed" instructions after an exception or branch
> misprediction.
> 
> The Pentium Pro (introduced 1995-11-01), HP PA-8000 (introduced
> 1995-11-02), and MIPS R10000 (introduced 1996-01) are the first
> microprocessors which have full-blown OoO execution.
> 

What about PPC604? It had more limited OoO resources than the 3
processors you mentioned above, esp. fewer numeber of reservation
stations, but it most certainly had reorder buffers, 16 of them.
So, by your own definitions, it should be called the first single-chip
full-blown CPU.

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#111661 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

On Mon, 19 May 2025 23:41:15 +0300, Michael S wrote:

> What about PPC604? It had more limited OoO resources than the 3
> processors you mentioned above, esp. fewer numeber of reservation
> stations, but it most certainly had reorder buffers, 16 of them.
> So, by your own definitions, it should be called the first single-chip
> full-blown CPU.

Was it a PowerPC 604-based Apple Mac that was the first PC to exceed the 
then-current US Department of Defense threshold for the definition of a 
“supercomputer”? I think it might have been 1 gigaFLOPS at the time. (Or 
is that too high for the time?)

That meant it was subject to export restrictions. I remember Apple making 
a lot of publicity about it at the time.

Of course, the threshold was raised soon after.

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#111681 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

Michael S <already5chosen@yahoo.com> writes:
>On Mon, 19 May 2025 06:22:42 GMT
>anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
>> The Pentium Pro (introduced 1995-11-01), HP PA-8000 (introduced
>> 1995-11-02), and MIPS R10000 (introduced 1996-01) are the first
>> microprocessors which have full-blown OoO execution.
>> 
>
>What about PPC604? It had more limited OoO resources than the 3
>processors you mentioned above, esp. fewer numeber of reservation
>stations, but it most certainly had reorder buffers, 16 of them.
>So, by your own definitions, it should be called the first single-chip
>full-blown CPU.

Yes.  The OoO nature with ROB is explained in
<https://arstechnica.com/articles/paedia/cpu/ppc-1.ars/6>.

Somehow that did not register with me earlier (even though a collegue
had a Mac with a PPC 604e IIRC).  I guess it's because Apple Marketing
is low on technical details, and if Motorola emphasized this aspect,
that did not pass the filters of the press.  Also, IIRC the
performance was not so exceptional that it would direct a spotlight at
the underlying technology, whereas the Pentium Pro with its suprising
SPECint win certainly did.  Finally, the successors of the 604 (in
particular, the PPC 7450) did not progress much further with OoO
execution and still had only mild OoO capabilities at a time when the
Pentium 4 already has a 128-entry ROB (and other structure sizes to
match).  So given the lack of ambition in the 7450, I did not even
think about the possibility that the 604 might have been the first
microprocessor with OoO execution.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>

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#111895 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

On Tue, 20 May 2025 21:21:07 GMT
anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:

> Michael S <already5chosen@yahoo.com> writes:
> >On Mon, 19 May 2025 06:22:42 GMT
> >anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:  
> >> The Pentium Pro (introduced 1995-11-01), HP PA-8000 (introduced
> >> 1995-11-02), and MIPS R10000 (introduced 1996-01) are the first
> >> microprocessors which have full-blown OoO execution.
> >>   
> >
> >What about PPC604? It had more limited OoO resources than the 3
> >processors you mentioned above, esp. fewer numeber of reservation
> >stations, but it most certainly had reorder buffers, 16 of them.
> >So, by your own definitions, it should be called the first
> >single-chip full-blown CPU.  
> 
> Yes.  The OoO nature with ROB is explained in
> <https://arstechnica.com/articles/paedia/cpu/ppc-1.ars/6>.
> 
> Somehow that did not register with me earlier (even though a collegue
> had a Mac with a PPC 604e IIRC).  I guess it's because Apple Marketing
> is low on technical details, and if Motorola emphasized this aspect,
> that did not pass the filters of the press.  Also, IIRC the
> performance was not so exceptional that it would direct a spotlight at
> the underlying technology, whereas the Pentium Pro with its suprising
> SPECint win certainly did.  Finally, the successors of the 604 (in
> particular, the PPC 7450) did not progress much further with OoO
> execution 

From uArch perspective, PPC/MPC 7xx and 7xxx are really successors of
603 rather than of 604.

The thing closest to microarchitectural successor of 604 (via ill-fated
620) is POWER3, but that one was aimed at completely different market.
An offspring that attempted to re-enter PC processors market was PPC970
(a red-headed little brother of POWER4). This foray was terminated by
Steve Jobs (he always prefer Intel but until this millennium did not
poses political power to impose his preferences on technical team)
lasting for about 3 years.

> and still had only mild OoO capabilities at a time when the
> Pentium 4 already has a 128-entry ROB (and other structure sizes to
> match).  So given the lack of ambition in the 7450, I did not even
> think about the possibility that the 604 might have been the first
> microprocessor with OoO execution.
> 
> - anton

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#111899 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

> Steve Jobs (he always prefer Intel but until this millennium did not
> poses political power to impose his preferences on technical team)
> lasting for about 3 years.

His hardware products at NeXT prove this is nonsense.
The last NeXT prototype that I saw in a Moto lab in Austin
used the 88110.

He was completely capable of forcing his will on Apple hardware
engineers. Project leads who disagreed were let go or put into
continuation engineering.

The switch was pragmatic and forced because of the weak PPC
roadmap, especially in the portable space.

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#111900 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

Al Kossow <aek@bitsavers.org> writes:
>> Steve Jobs (he always prefer Intel but until this millennium did not
>> poses political power to impose his preferences on technical team)
>> lasting for about 3 years.
>
>His hardware products at NeXT prove this is nonsense.
>The last NeXT prototype that I saw in a Moto lab in Austin
>used the 88110.
>
>He was completely capable of forcing his will on Apple hardware
>engineers. Project leads who disagreed were let go or put into
>continuation engineering.
>
>The switch was pragmatic and forced because of the weak PPC
>roadmap, especially in the portable space.

We (Unisys) had some systems designed around the 88100 in
that time frame.   Apple's decision to go to PPC rather than
the 88110 caused us to evaluate all the current available
processors (SPARC, MIPS, x86, and PPC).    For rather pragmatic
reasons (the target machine used the Intel Paragon backplane),
the Pentium Pro was the ultimate choice, used to build the
OPUS family of massively parallel (yet single-system image)
computer systems.

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#111907 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

scott@slp53.sl.home (Scott Lurndal) writes:
>We (Unisys) had some systems designed around the 88100 in
>that time frame.   Apple's decision to go to PPC rather than
>the 88110 caused us to evaluate all the current available
>processors (SPARC, MIPS, x86, and PPC).    For rather pragmatic
>reasons (the target machine used the Intel Paragon backplane),
>the Pentium Pro was the ultimate choice, used to build the
>OPUS family of massively parallel (yet single-system image)
>computer systems.

Likewise, Data General's Aviion ( line of Unix workstations and
servers was based on the 88100, and I worked with them in 1990 and
1991.  When Motorola gave up the 88k line, DG gave up Motorola and
switched to Intel.  That worked for a while, but apparently they were
not successful enough with this line of business, and got bought by
EMC for DG's Clariion like of disk array storage products.  So going
for Intel was no Panacea, either.  It worked well enough to Unisys
survive, though.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>

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#111903 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

On Fri, 30 May 2025 10:51:14 -0700, Al Kossow wrote:

>> Steve Jobs (he always prefer Intel but until this millennium did not
>> poses political power to impose his preferences on technical team)
>> lasting for about 3 years.
> 
> His hardware products at NeXT prove this is nonsense.

Also, the entire history of the development of the first-generation 
Macintosh -- Motorola all the way, even after the switch from 68K to 
PowerPC.

> The switch was pragmatic and forced because of the weak PPC
> roadmap, especially in the portable space.

That’s why the last-gasp PowerPC processor that was used in any Macintosh, 
the G5, came from IBM, not Motorola. I think the hope was that IBM would 
step in where Motorola was faltering. But that hope didn’t last long.

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#111904 — Re: OoO execution

On Fri, 30 May 2025 22:05:31 +0000, Lawrence D'Oliveiro wrote:

> On Fri, 30 May 2025 10:51:14 -0700, Al Kossow wrote:
>
>>> Steve Jobs (he always prefer Intel but until this millennium did not
>>> poses political power to impose his preferences on technical team)
>>> lasting for about 3 years.
>>
>> His hardware products at NeXT prove this is nonsense.
>
> Also, the entire history of the development of the first-generation
> Macintosh -- Motorola all the way, even after the switch from 68K to
> PowerPC.

Steve had a power over Murry Goldman:: Goldman believed that Apple
volume would pay for the FAB, and thus the entire product line
consumed by Apple could be sold at marginal production costs.
Jobs knew nobody else would deliver product at this kind of cost
structure.

I have suspected Dell and Intel had/have a similar arrangement.

>> The switch was pragmatic and forced because of the weak PPC
>> roadmap, especially in the portable space.
>
> That’s why the last-gasp PowerPC processor that was used in any
> Macintosh,
> the G5, came from IBM, not Motorola. I think the hope was that IBM would
> step in where Motorola was faltering. But that hope didn’t last long.

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#111908 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

Michael S <already5chosen@yahoo.com> writes:
>On Tue, 20 May 2025 21:21:07 GMT
>anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
>
>> Michael S <already5chosen@yahoo.com> writes:
[PPC604]
>> Yes.  The OoO nature with ROB is explained in
>> <https://arstechnica.com/articles/paedia/cpu/ppc-1.ars/6>.
>>=20
>> Somehow that did not register with me earlier (even though a collegue
>> had a Mac with a PPC 604e IIRC).  I guess it's because Apple Marketing
>> is low on technical details, and if Motorola emphasized this aspect,
>> that did not pass the filters of the press.  Also, IIRC the
>> performance was not so exceptional that it would direct a spotlight at
>> the underlying technology, whereas the Pentium Pro with its suprising
>> SPECint win certainly did.  Finally, the successors of the 604 (in
>> particular, the PPC 7450) did not progress much further with OoO
>> execution=20
>
>=46rom uArch perspective, PPC/MPC 7xx and 7xxx are really successors of
>603 rather than of 604.

Looking at <https://arstechnica.com/features/2004/08/ppc-1/>, the 603e
is also a full-blown OoO CPU (it does not describe the 603 in enough
detail to establish that for the 603);
<https://en.wikipedia.org/wiki/PowerPC_600#PowerPC_603> says that the
603 is OoO, but does not give details.  In any case, the 603 appeared
around the same time as the 604, so the 604 might be the first
full-blown OoO CPU even if the 603 also is OoO.

In any case, the 750 and 7450 are full-blown OoO machines, but still
with relatibvely small buffers: the 7450 (introduced 2001) has a
six-entry integer queue, and apparently only three of the entries can
be used for reordering (chipsnchees calls this a three-entry scheduler
preceded by a three-entry non-scheduling queue); similarly, the vector
side has a two-entry scheduler preceded by a two-entry non-scheduling
queue.  I don't find information about the size of the reorder buffer
of the 7450, but it has 16 rename registers for the GPRs and 16 rename
registers for the vector registers, which is indicative of its
reordering capabilities.

By contrast, the AMD K7 (1999) has a 15-entry integer scheduler, a
36-entry FP scheduler, a 72-entry ROB, 88 FP registers (-8 for the 8
architectural 387 registers), and IIRC 72 integer registers (-8 for
the 8 architectural GPRs).  I wonder why they needed 80 FP rename
registers if they could reorder only across 72 instructions.  In any
case, this appeared earlier and had much more reordering capability
than the PPC 7450.  I wonder why the 7450 designers chose to have that
little reorder capacity.  Too much space spent on Altivec?  Did they
have a design that was hard to scale for more entries?  Power
consumption?

>An offspring that attempted to re-enter PC processors market was PPC970
>(a red-headed little brother of POWER4). This foray was terminated by
>Steve Jobs (he always prefer Intel but until this millennium did not
>poses political power to impose his preferences on technical team)
>lasting for about 3 years.

The PPC970 was marketed by Steve Jobs, as usual, as the best thing
since sliced bread, but in my work, it was slower than comtemporary
IA-32 and AMD64 systems:

All the numbers below are execution times in seconds, so lower means
faster:

From <https://www.complang.tuwien.ac.at/franz/latex-bench>

- PowerMac G5, 2000MHz PPC970, Gentoo Linux PPC64		  1.47
- Athlon 64 3200+, 2000MHz, 1MB L2, Fedora Core 1 (64-bit)        0.76

From <https://cgit.git.savannah.gnu.org/cgit/gforth.git/plain/Benchres>

sieve bubble matrix  fib
0.279 0.411  0.183 0.519 0.7.0; PPC970 2GHz (PowerMac G5); gcc-4.1.2 20061115 (prerelease) (Debian 4.1.1-21)
0.245 0.287  0.156 0.376 0.7.0; Pentium 4 Northwood 2.26GHz; gcc-2.95.4 20011002 (Debian prerelease)
0.216 0.268  0.112 0.340 0.7.0; K8 2GHz (Opteron 270); gcc-4.1.3 20080623 (prerelease) (Debian 4.1.2-23)

Many years later I did some microbenchmarking
<https://www.complang.tuwien.ac.at/anton/undefined-div-bench/> that
involved division instructions.  I was surprised by the slowness of
the PPC970 on this microbenchmark.  Results in cycles per iteration
(lower is better):

  ooomb   oooub
   41.9    41.9 PPC 7447A (iBook G4) ppc (32-bit) gcc-4.3.2
  130.0   130.0 PPC 970 (PowerMac G5) ppc64  gcc-4.4.5

(but note that this compares 32-bit with 64-bit division).

As for the question of why Apple switched to Intel, it appeared pretty
clear to me: At the level where they were working, the M of AIM could
not keep up in the GHz race, the I in AIM finally manage to get the
GHz (that the performance was subpar did not register with me at the
time; Apple marketing worked:-) with the PPC970, but that was too
power-hungry for laptops.  Probably both M and I demanded more money
from A in order to develop in the direction that A was asking them to.
A did not want to provide the money, so they developed for their
specific markets: M developed what the embedded market asked for, I
developed for servers and workstations.  My guess is that Intel
already had the high-performance laptop CPUs that Apple needed,
because that was in their market, so they could offer Apple a better
deal, and that's how it went.

The irony is that P.A. Semi worked on the kind of CPUs that Apple
wanted, lost their prospective customer with this move by Apple, was
then bought by Apple in 2008, and their workforce became part of what
is now Apple Silicon, and worked on the chips that first powered
iPhones and later displaced Intel from Apple's laptop and desktop
computers.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>

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#111883 — Re: OoO execution (was: The Seymour Cray Era of Supercomputers)

Anton Ertl <anton@mips.complang.tuwien.ac.at> schrieb:
> quadibloc <quadibloc@gmail.com> writes:
>>Eventually, IBM caught up with the Control
>>Data 6600 by perfecting pipelining in the IBM 360/91, and then combining
>>it with cache in the 360/195. From the Pentium II onwards, that's the
>>way computers are made nowadays.
>
> Pipelining and caches are already used on the MIPS R2000 in 1986, and
> the 486 in 1989.

Or the 801.  That may have been the first machine to have
separate I- and D-caches (was it?)

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