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| Started by | jgk@panix.com (Joe keane) |
|---|---|
| First post | 2011-11-13 21:40 +0000 |
| Last post | 2011-11-13 20:52 -0600 |
| Articles | 3 — 3 participants |
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transistor count jgk@panix.com (Joe keane) - 2011-11-13 21:40 +0000
Re: transistor count Andrew Reilly <areilly---@bigpond.net.au> - 2011-11-13 22:15 +0000
Re: transistor count del cecchi <delcecchi@gmail.com> - 2011-11-13 20:52 -0600
| From | jgk@panix.com (Joe keane) |
|---|---|
| Date | 2011-11-13 21:40 +0000 |
| Subject | transistor count |
| Message-ID | <j9pdgc$ah4$1@reader1.panix.com> |
most efficient: Pentium III AMD K5 Motorola 6809 MOS Technology 6502 Pentium II AMD K6 least efficient: Dual-core Itanium 2 Itanium 2
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| From | Andrew Reilly <areilly---@bigpond.net.au> |
|---|---|
| Date | 2011-11-13 22:15 +0000 |
| Message-ID | <9iatrgFheeU1@mid.individual.net> |
| In reply to | #4752 |
On Sun, 13 Nov 2011 21:40:28 +0000, Joe keane wrote: > most efficient: Pentium III AMD K5 Motorola 6809 MOS Technology 6502 > Pentium II AMD K6 > > least efficient: Dual-core Itanium 2 Itanium 2 Is that performance/transistor on some particular scale? I would be surprised if the 6809 was really higher on the list than the 6502, but it would depend on the benchmark. (Difficult to imagine a benchmark that can cover that scale sensibly...) I'd also be surprised if the ARM2 wasn't on the first list somewhere (the first, cacheless one that clocked the core according to whether the instruction fetch was doing a RAS or a CAS-only access.) Cheers, -- Andrew
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| From | del cecchi <delcecchi@gmail.com> |
|---|---|
| Date | 2011-11-13 20:52 -0600 |
| Message-ID | <j9pvpj$qv7$1@dont-email.me> |
| In reply to | #4753 |
On 11/13/2011 4:15 PM, Andrew Reilly wrote: > On Sun, 13 Nov 2011 21:40:28 +0000, Joe keane wrote: > >> most efficient: Pentium III AMD K5 Motorola 6809 MOS Technology 6502 >> Pentium II AMD K6 >> >> least efficient: Dual-core Itanium 2 Itanium 2 > > Is that performance/transistor on some particular scale? I would be > surprised if the 6809 was really higher on the list than the 6502, but it > would depend on the benchmark. (Difficult to imagine a benchmark that > can cover that scale sensibly...) > > I'd also be surprised if the ARM2 wasn't on the first list somewhere (the > first, cacheless one that clocked the core according to whether the > instruction fetch was doing a RAS or a CAS-only access.) > > Cheers, > And you did derate performance to compensate for later devices having faster transistors, right? -- del
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