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what's the startup clock frequency of PIC1703

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  what's the startup clock frequency of PIC1703 Johann Klammer <klammerj@NOSPAM.a1.net> - 2018-06-24 11:12 +0200
    Re: what's the startup clock frequency of PIC16F1703 Johann Klammer <klammerj@NOSPAM.a1.net> - 2018-06-24 22:02 +0200
    Re: what's the startup clock frequency of PIC1703 jjoey.gold@gmail.com - 2018-08-04 05:38 -0700
      Re: what's the startup clock frequency of PIC1703 jjoey.gold@gmail.com - 2018-08-04 05:40 -0700
        Re: what's the startup clock frequency of PIC1703 Johann Klammer <klammerj@NOSPAM.a1.net> - 2018-08-04 20:45 +0200
    Re: what's the startup clock frequency of PIC1703 John Temples <usenet@xargs-spam.com> - 2018-08-06 00:40 +0000
      Re: what's the startup clock frequency of PIC1703 Johann Klammer <klammerj@NOSPAM.a1.net> - 2018-08-07 23:21 +0200
        Re: what's the startup clock frequency of PIC1703 John Temples <usenet@xargs-spam.com> - 2018-08-08 06:33 +0000
          Re: what's the startup clock frequency of PIC1703 jjoey.gold@gmail.com - 2018-08-08 00:47 -0700
          Re: what's the startup clock frequency of PIC1703 Johann Klammer <klammerj@NOSPAM.a1.net> - 2018-08-09 05:26 +0200

#27852 — what's the startup clock frequency of PIC1703

I'd like to run from internal osc (XTAL pins as GPIO), but from the configuration bits it looks like
it defaults to ext clk. 
I can't seem to find docs on their two speed startup and Fail-safe clock monitor thingy. 
Also, will LVP work?

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#27853 — Re: what's the startup clock frequency of PIC16F1703

On 06/24/2018 11:12 AM, Johann Klammer wrote:
> I'd like to run from internal osc (XTAL pins as GPIO), but from the configuration bits it looks like
> it defaults to ext clk. 
> I can't seem to find docs on their two speed startup and Fail-safe clock monitor thingy. 
> Also, will LVP work?
> 

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#27943

On Sunday, 24 June 2018 19:12:19 UTC+10, Johann Klammer  wrote:
> I'd like to run from internal osc (XTAL pins as GPIO), but from the configuration bits it looks like
> it defaults to ext clk. 
> I can't seem to find docs on their two speed startup and Fail-safe clock monitor thingy. 
> Also, will LVP work?

You mean the PIC16F1703  right.

data sheet here 
http://ww1.microchip.com/downloads/en/DeviceDoc/40001722C.pdf

Please read page 48 - 52  for the non-volatile  device configuration settings.  On reset  the mcu reads these settings and configures the mcu for execution of the program.

Bits  FOSC<1:0>:   tell the 1703  which Osc to use


Please read page 62 onward regarding setting the Oscillator and fail safe

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#27944

On Saturday, 4 August 2018 22:38:36 UTC+10, jjoey...@gmail.com  wrote:
> On Sunday, 24 June 2018 19:12:19 UTC+10, Johann Klammer  wrote:
> > I'd like to run from internal osc (XTAL pins as GPIO), but from the configuration bits it looks like
> > it defaults to ext clk. 
> > I can't seem to find docs on their two speed startup and Fail-safe clock monitor thingy. 
> > Also, will LVP work?
> 
> You mean the PIC16F1703  right.
> 
> data sheet here 
> http://ww1.microchip.com/downloads/en/DeviceDoc/40001722C.pdf
> 
> Please read page 48 - 52  for the non-volatile  device configuration settings.  On reset  the mcu reads these settings and configures the mcu for execution of the program.
> 
> Bits  FOSC<1:0>:   tell the 1703  which Osc to use
> 
> 
> Please read page 62 onward regarding setting the Oscillator and fail safe

You may also care to use MPLAB X  IDE and  Plug-In  MCC to gernerate code to control these registers
https://www.youtube.com/user/MicrochipTechnology/search?query=MCC

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#27946

On 08/04/2018 02:40 PM, jjoey.gold@gmail.com wrote:
> 
> You may also care to use MPLAB X  IDE and  Plug-In  MCC to gernerate code to control these registers
> https://www.youtube.com/user/MicrochipTechnology/search?query=MCC
> 
I was wondering if it was actually possible to set 
those registers without an external clock present, as
the factory defaults seem to indicate external clock. 

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#27947

On 2018-06-24, Johann Klammer <klammerj@NOSPAM.a1.net> wrote:
> I'd like to run from internal osc (XTAL pins as GPIO), but from the configuration bits it looks like
> it defaults to ext clk. 

The default doesn't matter.  If you want the internal oscillator, 
set the relevant configuration fuses accordingly in your code.

> I can't seem to find docs on their two speed startup and Fail-safe clock monitor thingy. 

That appears to be an error in the data sheet.  I can't see any
evidence that this PIC has those features.  You'd need to contact
Microchip to be sure.

> Also, will LVP work?

Do you have a reason to think it wouldn't work?

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#27957

On 08/06/2018 02:40 AM, John Temples wrote:
> On 2018-06-24, Johann Klammer <klammerj@NOSPAM.a1.net> wrote:
>> I'd like to run from internal osc (XTAL pins as GPIO), but from the configuration bits it looks like
>> it defaults to ext clk. 
> 
> The default doesn't matter.  If you want the internal oscillator, 
> set the relevant configuration fuses accordingly in your code.
> 
>> I can't seem to find docs on their two speed startup and Fail-safe clock monitor thingy. 
> 
> That appears to be an error in the data sheet.  I can't see any
> evidence that this PIC has those features.  You'd need to contact
> Microchip to be sure.
> 
>> Also, will LVP work?
> 
> Do you have a reason to think it wouldn't work?
> 
It requires a working clock, no?
Without one, how do you enter LVP to set the FOSC fuse?

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#27960

On 2018-08-07, Johann Klammer <klammerj@NOSPAM.a1.net> wrote:
> On 08/06/2018 02:40 AM, John Temples wrote:
>>> Also, will LVP work?
>> 
>> Do you have a reason to think it wouldn't work?
>> 
> It requires a working clock, no?
> Without one, how do you enter LVP to set the FOSC fuse?

The programmer (ICD3, etc.) provides a clock on the PGC line when
programming the device.  The CPU doesn't run its own clock.

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#27961

On Wednesday, 8 August 2018 16:33:23 UTC+10, John Temples  wrote:
> On 2018-08-07, Johann Klammer <klammerj@NOSPAM.a1.net> wrote:
> > On 08/06/2018 02:40 AM, John Temples wrote:
> >>> Also, will LVP work?
> >> 
> >> Do you have a reason to think it wouldn't work?
> >> 
> > It requires a working clock, no?
> > Without one, how do you enter LVP to set the FOSC fuse?
> 
> The programmer (ICD3, etc.) provides a clock on the PGC line when
> programming the device.  The CPU doesn't run its own clock.

In your C code or header file you include #PARAM xxx  setting

16F1703 Support Information
#pragma config Usage
#pragma config <setting>=<named value>
For example:
// Oscillator Selection Bits: External oscillator, high power. I/O function on RA4
// Watchdog Timer Enable: WDT enabled
// Power-up Timer Enable: PWRT disabled
// MCLR Pin Function Select: MCLR/VPP pin function is MCLR
// Flash Program Memory Code Protection: Program memory code protection is disabled
// Brown-out Reset Enable: Brown-out Reset enabled
// Clock Out Enable: CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#pragma config FOSC = ECH, WDTE = ON, PWRTE = OFF, MCLRE = ON, CP = OFF, BOREN = ON, CLKOUTEN = OFF
#pragma config <setting>=<literal constant>
For example:
// Oscillator Selection Bits: External oscillator, high power. I/O function on RA4
// Watchdog Timer Enable: WDT enabled
// Power-up Timer Enable: PWRT disabled
// MCLR Pin Function Select: MCLR/VPP pin function is MCLR
// Flash Program Memory Code Protection: Program memory code protection is disabled
// Brown-out Reset Enable: Brown-out Reset enabled
// Clock Out Enable: CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#pragma config FOSC = 0x3, WDTE = 0x3, PWRTE = 0x1, MCLRE = 0x1, CP = 0x1, BOREN = 0x3, CLKOUTEN = 0x1
#pragma config <register>=<literal constant>
For example:
// Oscillator Selection Bits: External oscillator, high power. I/O function on RA4
// Watchdog Timer Enable: WDT enabled
// Power-up Timer Enable: PWRT disabled
// MCLR Pin Function Select: MCLR/VPP pin function is MCLR
// Flash Program Memory Code Protection: Program memory code protection is disabled
// Brown-out Reset Enable: Brown-out Reset enabled
// Clock Out Enable: CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#pragma config CONFIG1 = 0xFFFF

For example:
// IDLOC @ 0x8000
#pragma config IDLOC0 = 0x3FFF

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#pragma config Settings
Register: CONFIG1 @ 0x8007
FOSC =	Oscillator Selection Bits	
ECH	External oscillator, high power. I/O function on RA4	
ECM	External oscillator, medium power. I/O function on RA4	
ECL	External oscillator, low power. I/O function on RA4	
INTOSC	Internal HFINTOSC. I/O function on RA4 and RA5.	
WDTE =	Watchdog Timer Enable	
ON	WDT enabled	
NSLEEP	WDT enabled while running and disabled in Sleep	
SWDTEN	WDT controlled by the SWDTEN bit in the WDTCON register	
OFF	WDT disabled	
PWRTE =	Power-up Timer Enable	
OFF	PWRT disabled	
ON	PWRT enabled	
MCLRE =	MCLR Pin Function Select	
ON	MCLR/VPP pin function is MCLR	
OFF	MCLR/VPP pin function is digital input	
CP =	Flash Program Memory Code Protection	
OFF	Program memory code protection is disabled	
ON	Program memory code protection is enabled	
BOREN =	Brown-out Reset Enable	
ON	Brown-out Reset enabled	
NSLEEP	Brown-out Reset enabled while running and disabled in Sleep	
SBODEN	Brown-out Reset controlled by the SBOREN bit in the BORCON register	
OFF	Brown-out Reset disabled	
CLKOUTEN =	Clock Out Enable	
OFF	CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin	
ON	CLKOUT function is enabled on the CLKOUT pin	
Register: CONFIG2 @ 0x8008
WRT =	Flash Memory Self-Write Protection	
OFF	Write protection off	
BOOT	000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control	
HALF	000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control	
ALL	000h to 1FFFh write protected, no addresses may be modified by EECON control	
PPS1WAY =	Peripheral Pin Select one-way control	
ON	The PPSLOCK bit cannot be cleared once it is set by software	
OFF	The PPSLOCK bit can be set and cleared repeatedly by software	
ZCDDIS =	Zero-cross detect disable	
ON	Zero-cross detect circuit is disabled at POR	
OFF	Zero-cross detect circuit is enabled at POR	
PLLEN =	Phase Lock Loop enable	
ON	4x PLL is always enabled	
OFF	4x PLL is enabled when software sets the SPLLEN bit	
STVREN =	Stack Overflow/Underflow Reset Enable	
ON	Stack Overflow or Underflow will cause a Reset	
OFF	Stack Overflow or Underflow will not cause a Reset	
BORV =	Brown-out Reset Voltage Selection	
LO	Brown-out Reset Voltage (Vbor), low trip point selected.	
HI	Brown-out Reset Voltage (Vbor), high trip point selected.	
LPBOR =	Low-Power Brown Out Reset	
OFF	Low-Power BOR is disabled	
ON	Low-Power BOR is enabled	
LVP =	Low-Voltage Programming Enable	
ON	Low-voltage programming enabled	
OFF	High-voltage on MCLR/VPP must be used for programming	

Register: IDLOC0 @ 0x8000
Register: IDLOC1 @ 0x8001
Register: IDLOC2 @ 0x8002
Register: IDLOC3 @ 0x8003
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Looking at the  XC8 'C' compiler docs for the PIC16F1703

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#27962

On 08/08/2018 08:33 AM, John Temples wrote:
> 
> The programmer (ICD3, etc.) provides a clock on the PGC line when
> programming the device.  The CPU doesn't run its own clock.
> 
Ah thanks. all good then. My worry was mainly about running into chicken and egg problems. 

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