Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > comp.arch.embedded > #28812

Re: RISC-V Picking Up Steam

Show all headers | View raw

On 15/09/2019 23:50, lasselangwadtchristensen@gmail.com wrote:
> søndag den 15. september 2019 kl. 12.51.04 UTC+2 skrev David Brown:
>> On 15/09/2019 12:43, lasselangwadtchristensen@gmail.com wrote:
>>> torsdag den 5. september 2019 kl. 00.46.31 UTC+2 skrev Rick C:
>>>> On Wednesday, September 4, 2019 at 5:38:59 PM UTC-4, Dave Nadler wrote:
>>>>> On Wednesday, September 4, 2019 at 4:07:09 PM UTC-4, Rick C wrote:
>>>>>> ...I can't find a data sheet on either the CPUs or the board.
>>>>>
>>>>> I think everything you're looking for is here:
>>>>> https://open-isa.org/downloads/
>>>>
>>>> Thanks.  This chip is much more complex than I would have expected.  If I'm reading the docs right, there are four CPUs?  Or maybe there are two versions of the chip, one with two ARM CPUs and one with two RISC-V CPUs?
>>>>
>>>
>>> as far as I can tell they just hedge their bets by putting both
>>> arm and risc-v on the chip, but you can't use both you have to chose
>>> which to use
>>>
>>
>> The chip is designed purely for the purposes of comparison and
>> evaluation.  It will let people get an idea of whether RISC-V or ARM
>> will be the best choice (or if they are equally usable) in a
>> microcontroller context.
>>
>> I suppose NXP is hedging their bets in that they will make whatever
>> chips people want to buy.
> 
> and if people don't want RISC-V the chip isn't a total waste
> (assuming it doesn't take that up much die area)
> 

The chip will never be sold to people who want an ARM core.  It will 
never be sold in quantity to anyone, other than people making evaluation 
or demo cards.  It is targeted at people who don't know if they are best 
served by a RISC-V core or an ARM core, so that they can make a 
comparison with a single device that lets them swap between cores, and 
provides identical peripherals for each core.  They can write a single 
application, and with no more than a little conditional compilation 
compile that application for either ARM or RISC-V.  They can run it on 
the two cores, and measure speed, power, and any other factors that 
interest them.  They can swap back and forth, testing on each core.

Then they will go back to NXP and say "That RISC-V core is great.  It 
let me get the same results for half the battery usage" or "That RISC-V 
core is okay, but not significantly different from ARM for my 
applications - I'll stick to what I know unless the price is good 
enough", or "The RISC-V core was rubbish - I prefer ARM".

Back to comp.arch.embedded | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

RISC-V Picking Up Steam Rick C <gnuarm.deletethisbit@gmail.com> - 2019-09-04 07:59 -0700
  Re: RISC-V Picking Up Steam Dave Nadler <drn@nadler.com> - 2019-09-04 10:31 -0700
    Re: RISC-V Picking Up Steam Rick C <gnuarm.deletethisbit@gmail.com> - 2019-09-04 13:07 -0700
      Re: RISC-V Picking Up Steam Dave Nadler <drn@nadler.com> - 2019-09-04 14:38 -0700
        Re: RISC-V Picking Up Steam Rick C <gnuarm.deletethisbit@gmail.com> - 2019-09-04 15:46 -0700
          Re: RISC-V Picking Up Steam Dave Nadler <drn@nadler.com> - 2019-09-04 15:52 -0700
          Re: RISC-V Picking Up Steam lasselangwadtchristensen@gmail.com - 2019-09-15 03:43 -0700
            Re: RISC-V Picking Up Steam David Brown <david.brown@hesbynett.no> - 2019-09-15 12:51 +0200
              Re: RISC-V Picking Up Steam lasselangwadtchristensen@gmail.com - 2019-09-15 14:50 -0700
                Re: RISC-V Picking Up Steam David Brown <david.brown@hesbynett.no> - 2019-09-15 23:59 +0200
            Re: RISC-V Picking Up Steam Rick C <gnuarm.deletethisbit@gmail.com> - 2019-09-15 18:07 -0700
              Re: RISC-V Picking Up Steam David Brown <david.brown@hesbynett.no> - 2019-09-16 09:16 +0200

csiph-web