Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > comp.arch.embedded > #26229
| From | David Brown <david.brown@hesbynett.no> |
|---|---|
| Newsgroups | comp.arch.embedded |
| Subject | Re: Short blocking delay in Cortex-M0+ |
| Date | 2017-03-25 01:11 +0100 |
| Organization | A noiseless patient Spider |
| Message-ID | <ob4cdt$3ga$1@dont-email.me> (permalink) |
| References | (1 earlier) <ob2vem$37q$1@dont-email.me> <ob31ei$9k7$1@dont-email.me> <ob34pd$lfg$1@dont-email.me> <ob39rm$7pk$1@dont-email.me> <ob3rnm$82s$1@dont-email.me> |
On 24/03/17 20:26, Tauno Voipio wrote:
> On 24.3.17 16:21, David Brown wrote:
>>
>> Finally, they might like to note that:
>>
>> void portable_delay_cycles(unsigned long n) {
>> while (n--) {
>> asm volatile ("");
>> }
>> }
>>
>> gives a faster loop, as well as actually being portable!
>>
>> The best code for accurate delays is usually made by having static
>> inline functions, so that the compiler can calculate and compensate for
>> loop entry/exit directly, and use whatever registers make most sense for
>> efficient code.
>>
>>
>>
>
> I would delete the cmp instruction and change the sub instruction
> to a subs instruction.
That is what gcc generates for the C loop above (I said it gave a faster
loop, but did not post the generated code).
>
> One more vote to the C version of David.
>
Yes.
The " asm volatile(""); " trick might be new to some people - it tells
the compiler "pretend something important is happening here, even though
there is no code". It is cheaper than the traditional idea of making
the loop variable volatile to force the compiler to keep the loop, or
the alternative of using an assembly "nop" instruction.
Back to comp.arch.embedded | Previous | Next — Previous in thread | Find similar | Unroll thread
Short blocking delay in Cortex-M0+ pozz <pozzugno@gmail.com> - 2017-02-23 17:15 +0100
Re: Short blocking delay in Cortex-M0+ John Speth <johnspeth@yahoo.com> - 2017-02-23 09:00 -0800
Re: Short blocking delay in Cortex-M0+ Tim Wescott <tim@seemywebsite.com> - 2017-02-23 13:15 -0600
Re: Short blocking delay in Cortex-M0+ pozz <pozzugno@gmail.com> - 2017-02-24 09:51 +0100
Re: Short blocking delay in Cortex-M0+ rickman <gnuarm@gmail.com> - 2017-02-24 04:26 -0500
Re: Short blocking delay in Cortex-M0+ Tim Wescott <seemywebsite@myfooter.really> - 2017-02-24 14:22 -0600
Re: Short blocking delay in Cortex-M0+ Jack <jack4747@gmail.com> - 2017-02-24 02:22 -0800
Re: Short blocking delay in Cortex-M0+ Don Y <blockedofcourse@foo.invalid> - 2017-02-24 10:51 -0700
Re: Short blocking delay in Cortex-M0+ Stefan Reuther <stefan.news@arcor.de> - 2017-02-24 18:29 +0100
Re: Short blocking delay in Cortex-M0+ Dave Nadler <drn@nadler.com> - 2017-02-24 13:03 -0800
Re: Short blocking delay in Cortex-M0+ mrfirmware <mrfirmware@gmail.com> - 2017-03-22 09:29 -0700
Re: Short blocking delay in Cortex-M0+ mrfirmware <mrfirmware@gmail.com> - 2017-03-22 09:48 -0700
Re: Short blocking delay in Cortex-M0+ Hans-Bernhard Bröker <HBBroeker@t-online.de> - 2017-03-22 22:02 +0100
Re: Short blocking delay in Cortex-M0+ David Brown <david.brown@hesbynett.no> - 2017-03-23 10:05 +0100
Re: Short blocking delay in Cortex-M0+ Tim Wescott <seemywebsite@myfooter.really> - 2017-03-23 12:54 -0500
Re: Short blocking delay in Cortex-M0+ mrfirmware <mrfirmware@gmail.com> - 2017-03-23 12:52 -0700
Re: Short blocking delay in Cortex-M0+ Don Y <blockedofcourse@foo.invalid> - 2017-02-23 13:54 -0700
Re: Short blocking delay in Cortex-M0+ Paul <paul@pcserviceselectronics.co.uk> - 2017-02-24 10:36 +0000
Re: Short blocking delay in Cortex-M0+ pozz <pozzugno@gmail.com> - 2017-03-24 12:23 +0100
Re: Short blocking delay in Cortex-M0+ David Brown <david.brown@hesbynett.no> - 2017-03-24 12:57 +0100
Re: Short blocking delay in Cortex-M0+ pozz <pozzugno@gmail.com> - 2017-03-24 13:54 +0100
Re: Short blocking delay in Cortex-M0+ David Brown <david.brown@hesbynett.no> - 2017-03-24 15:21 +0100
Re: Short blocking delay in Cortex-M0+ Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2017-03-24 21:26 +0200
Re: Short blocking delay in Cortex-M0+ David Brown <david.brown@hesbynett.no> - 2017-03-25 01:11 +0100
csiph-web