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Groups > comp.arch.embedded > #26196
| From | Don Y <blockedofcourse@foo.invalid> |
|---|---|
| Newsgroups | comp.arch.embedded |
| Subject | Re: Speaking of Multiprocessing... |
| Date | 2017-03-24 01:22 -0700 |
| Organization | A noiseless patient Spider |
| Message-ID | <ob2kqd$1pc$1@dont-email.me> (permalink) |
| References | (1 earlier) <rtKdndLJ5_hkyknFnZ2dnUU7-UednZ2d@giganews.com> <ob1leb$v25$1@dont-email.me> <rtKdnczJ5_g2w0nFnZ2dnUU7-UednZ2d@giganews.com> <ob1q9q$c5u$1@dont-email.me> <sji9dcl6kvjibcevumqh6ukghs9s7mbbif@4ax.com> |
On 3/24/2017 12:48 AM, upsidedown@downunder.com wrote: > On Thu, 23 Mar 2017 17:49:39 -0700, Don Y > <blockedofcourse@foo.invalid> wrote: > >> On 3/23/2017 4:47 PM, Tim Wescott wrote: >>> On Thu, 23 Mar 2017 16:26:46 -0700, Don Y wrote: >>> >>>> On 3/23/2017 4:19 PM, Tim Wescott wrote: >>>>> On Thu, 23 Mar 2017 18:38:13 -0400, rickman wrote: >>>>> >>>>>> I recall a discussion about the design of an instruction set >>>>>> architecture where someone was saying an instruction was required to >>>>>> test and set a bit or word as an atomic operation if it was desired to >>>>>> support multiple processors. Is this really true? Is this a function >>>>>> that can't be emulated with other operations including the disabling >>>>>> of interrupts? >>>>> >>>>> AFAIK as long as you surround your "test and set" with an interrupt >>>>> disable and an interrupt enable then you're OK. At least, you're OK >>>>> unless you have a processor that treats interrupts really strangely. >>>> >>>> Rethink that for the case of SMP... (coincidentally, "Support Multiple >>>> Processors" :> ) >>> >>> D'oh. Atomic to the common memory, not to each individual processor, yes. >> >> Yes. If the processor supports a RMW memory cycle AND the memory >> arbiter honors that contract, then any competing processors would >> explicitly be held off from accessing the location in question >> until the RMW cycle terminated. > > The R/M/W popular a few decades ago when the core memory was much > slower than the processor. The read operation in core memory is > destructive, so you have to write back the original value. This is > usually done within the memory controller, the same or modified value > could also be written back by the processor, so you get the R/M/W > sequence practically for "free". On many "microprocessors", there are hints as to when RMW cycles are undertaken. E.g., the m68k would only issue address strobe for the "two phase" RMW cycle (a consequence of the TAS opcode). But, this requires the memory arbiter (for closely coupled coprocessors) to monitor /AS and not attempt early (read vs write) cycle termination (which is a potential performance hack in a shared memory system) by just watching the individual data strobes. Other legacy processors usually had exploits that could be leveraged to deduce when RMW-ish cycles were in effect -- at the cost of a bit of external logic (e.g., decoding opcode fetch cycles to provide cleaner arbitration points for memory sharing). However, as bus interface units became increasingly decoupled from execution units, it gets harder to reliably infer what is ACTUALLY happening in the CPU just by watching the bus. > In modern systems, things get complicated, since you may have to read > a full 64 bit memory word, bypassing caches on both read and write > while keeping the RAS active through the whole sequence. With SoC's, there's very little you can do to second-guess the processor so you have to rely on the processor to perform this sort of access (esp as the memory in question might be entirely "internal" to the processor).
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Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-23 18:38 -0400
Re: Speaking of Multiprocessing... Tim Wescott <seemywebsite@myfooter.really> - 2017-03-23 18:19 -0500
Re: Speaking of Multiprocessing... Don Y <blockedofcourse@foo.invalid> - 2017-03-23 16:26 -0700
Re: Speaking of Multiprocessing... Tim Wescott <seemywebsite@myfooter.really> - 2017-03-23 18:47 -0500
Re: Speaking of Multiprocessing... Don Y <blockedofcourse@foo.invalid> - 2017-03-23 17:49 -0700
Re: Speaking of Multiprocessing... upsidedown@downunder.com - 2017-03-24 09:48 +0200
Re: Speaking of Multiprocessing... Don Y <blockedofcourse@foo.invalid> - 2017-03-24 01:22 -0700
Re: Speaking of Multiprocessing... Clifford Heath <no.spam@please.net> - 2017-03-24 21:04 +1100
Re: Speaking of Multiprocessing... Robert Wessel <robertwessel2@yahoo.com> - 2017-03-24 22:01 -0500
Re: Speaking of Multiprocessing... Clifford Heath <no.spam@please.net> - 2017-03-25 18:49 +1100
Re: Speaking of Multiprocessing... Grant Edwards <invalid@invalid.invalid> - 2017-03-24 14:36 +0000
Re: Speaking of Multiprocessing... Robert Wessel <robertwessel2@yahoo.com> - 2017-03-23 22:43 -0500
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-24 01:05 -0400
Re: Speaking of Multiprocessing... Robert Wessel <robertwessel2@yahoo.com> - 2017-03-24 00:37 -0500
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-24 01:58 -0400
Re: Speaking of Multiprocessing... Robert Wessel <robertwessel2@yahoo.com> - 2017-03-24 02:07 -0500
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-24 13:36 -0400
Re: Speaking of Multiprocessing... David Brown <david.brown@hesbynett.no> - 2017-03-24 19:06 +0100
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-24 14:12 -0400
Re: Speaking of Multiprocessing... David Brown <david.brown@hesbynett.no> - 2017-03-25 01:48 +0100
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-24 22:10 -0400
Re: Speaking of Multiprocessing... David Brown <david.brown@hesbynett.no> - 2017-03-25 15:25 +0100
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-25 15:27 -0400
Re: Speaking of Multiprocessing... upsidedown@downunder.com - 2017-03-25 22:43 +0200
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-25 17:06 -0400
Re: Speaking of Multiprocessing... David Brown <david.brown@hesbynett.no> - 2017-03-26 17:28 +0200
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-26 13:27 -0400
Re: Speaking of Multiprocessing... Dimiter_Popoff <dp@tgi-sci.com> - 2017-03-25 00:42 +0200
Re: Speaking of Multiprocessing... rickman <gnuarm@gmail.com> - 2017-03-24 19:22 -0400
Re: Speaking of Multiprocessing... Rob Gaddi <rgaddi@highlandtechnology.invalid> - 2017-03-24 16:33 -0700
Re: Speaking of Multiprocessing... Robert Wessel <robertwessel2@yahoo.com> - 2017-03-24 22:47 -0500
Re: Speaking of Multiprocessing... Dimiter_Popoff <dp@tgi-sci.com> - 2017-03-25 12:40 +0200
Re: Speaking of Multiprocessing... Robert Wessel <robertwessel2@yahoo.com> - 2017-03-26 00:42 -0500
Re: Speaking of Multiprocessing... David Brown <david.brown@hesbynett.no> - 2017-03-24 09:17 +0100
Re: Speaking of Multiprocessing... Tom Gardner <spamjunk@blueyonder.co.uk> - 2017-03-24 09:28 +0000
Re: Speaking of Multiprocessing... David Brown <david.brown@hesbynett.no> - 2017-03-24 11:19 +0100
Re: Speaking of Multiprocessing... Tom Gardner <spamjunk@blueyonder.co.uk> - 2017-03-24 11:06 +0000
Re: Speaking of Multiprocessing... David Brown <david.brown@hesbynett.no> - 2017-03-24 12:21 +0100
Re: Speaking of Multiprocessing... Tom Gardner <spamjunk@blueyonder.co.uk> - 2017-03-24 16:09 +0000
Re: Speaking of Multiprocessing... David Brown <david.brown@hesbynett.no> - 2017-03-24 17:33 +0100
Re: Speaking of Multiprocessing... Tom Gardner <spamjunk@blueyonder.co.uk> - 2017-03-24 17:52 +0000
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