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Re: Self-hosting and the 6502

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  Re: Self-hosting and the 6502 Lev <thresh3@fastmail.com> - 2026-03-30 19:12 +0000
    Re: Self-hosting and the 6502 David Wade <g4ugm@dave.invalid> - 2026-03-30 21:01 +0100
      Re: Self-hosting and the 6502 Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2026-03-30 21:02 +0000
      Re: Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-03-31 00:44 +0000
        Re: Self-hosting and the 6502 antispam@fricas.org (Waldek Hebisch) - 2026-03-31 19:46 +0000
          Re: TSS, Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-03-31 20:48 +0000
            Re: TSS, Self-hosting and the 6502 antispam@fricas.org (Waldek Hebisch) - 2026-04-01 23:23 +0000
              Re: TSS, Self-hosting and the 6502 cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-02 10:53 +0000
                Re: TSS, Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-04-02 07:29 -0700
                  Re: TSS, Self-hosting and the 6502 Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2026-04-02 16:58 +0000
                    Re: TSS, Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-04-02 20:34 +0000
                      Re: TSS, Self-hosting and the 6502 Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2026-04-02 20:53 +0000
          Re: Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-03-31 21:01 +0000
          Re: Self-hosting and the 6502 Lynn Wheeler <lynn@garlic.com> - 2026-04-03 16:53 -1000
            Re: Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-04-04 03:57 +0000
              Re: Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-04-04 07:37 -0700
                Re: Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-04-04 21:55 +0000
                  Re: Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-04-04 15:48 -0700
                    Re: ancient time sharingSelf-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-04-05 02:27 +0000
                Re: Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-04-04 22:03 +0000
                  Re: Self-hosting and the 6502 Lynn Wheeler <lynn@garlic.com> - 2026-04-04 12:31 -1000
              Re: Self-hosting and the 6502 Lynn Wheeler <lynn@garlic.com> - 2026-04-04 07:40 -1000
              Re: Self-hosting and the 6502 Lars Poulsen <lars@beagle-ears.com> - 2026-04-04 13:44 -0700
                Re: Self-hosting and the 6502 (VSCP) ted@loft.tnolan.com (Ted Nolan <tednolan>) - 2026-04-05 20:23 +0000
          Re: Self-hosting and the 6502 Lynn Wheeler <lynn@garlic.com> - 2026-04-04 12:53 -1000
            Re: Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-04-04 23:44 +0000
              Re: Self-hosting and the 6502 David Wade <g4ugm@dave.invalid> - 2026-04-05 09:29 +0100
                Re: CMS, Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-04-05 19:22 +0000
                  Re: CMS, Self-hosting and the 6502 Lynn Wheeler <lynn@garlic.com> - 2026-04-05 14:30 -1000
                    Re: CMS, Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-04-05 20:02 -0700
                    history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-11 09:05 -0300
                      Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Jeroen Belleman <jeroen@nospam.please> - 2026-09-11 16:49 +0200
                        Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Andy Burns <usenet@andyburns.uk> - 2026-09-11 15:58 +0100
                        Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-11 13:38 -0300
                          Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Jeroen Belleman <jeroen@nospam.please> - 2026-09-11 19:41 +0200
                            Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Andy Burns <usenet@andyburns.uk> - 2026-09-11 19:18 +0100
                              Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Jeroen Belleman <jeroen@nospam.please> - 2026-09-11 21:27 +0200
                                Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) scott@slp53.sl.home (Scott Lurndal) - 2026-09-11 21:13 +0000
                                Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Lynn Wheeler <lynn@garlic.com> - 2026-09-12 14:47 -1000
                                  Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Lars Poulsen <lars@beagle-ears.com> - 2026-09-13 15:02 -0700
                                    Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Peter Flass <Peter@Iron-Spring.com> - 2026-09-13 16:27 -0700
                                    Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Lynn Wheeler <lynn@garlic.com> - 2026-09-14 15:11 -1000
                                      Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-09-15 04:19 +0000
                                Computes at CERN (Re: history of ASCII and IBM ratfucking, and the VAX ) Lars Poulsen <lars@beagle-ears.com> - 2026-09-13 14:56 -0700
                                  Re: Computes at CERN (Re: history of ASCII and IBM ratfucking, and the VAX ) Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-09-15 04:10 +0000
                                    Re: Computes at CERN (Re: history of ASCII and IBM ratfucking, and the VAX ) Lars Poulsen <lars@beagle-ears.com> - 2026-09-15 05:46 -0700
                                      Re: Computes at CERN (Re: history of ASCII and IBM ratfucking, and the VAX ) Peter Flass <Peter@Iron-Spring.com> - 2026-09-15 07:51 -0700
                                        Re: Computes at CERN (Re: history of ASCII and IBM ratfucking, and the VAX ) Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-09-15 23:22 +0000
                                      Re: Computes at CERN (Re: history of ASCII and IBM ratfucking, and the VAX ) Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-09-15 23:13 +0000
                                    Re: Computes at CERN (Re: history of ASCII and IBM ratfucking, and the VAX ) Jeroen Belleman <jeroen@nospam.please> - 2026-09-15 16:48 +0200
                                    Re: Computes at CERN (Re: history of ASCII and IBM ratfucking, and the VAX ) John Ames <commodorejohn@gmail.com> - 2026-09-15 08:19 -0700
                        Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Lynn Wheeler <lynn@garlic.com> - 2026-09-12 14:13 -1000
                      Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Lynn Wheeler <lynn@garlic.com> - 2026-09-12 14:12 -1000
                        Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-13 14:02 -0300
                          Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Andy Burns <usenet@andyburns.uk> - 2026-09-13 18:55 +0100
                            Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Andy Burns <usenet@andyburns.uk> - 2026-09-13 19:03 +0100
                              Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Andy Burns <usenet@andyburns.uk> - 2026-09-13 19:07 +0100
                          Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Peter Flass <Peter@Iron-Spring.com> - 2026-09-13 16:21 -0700
                            Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Nuno Silva <nunojsilva@invalid.invalid> - 2026-09-14 00:37 +0100
                              Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Peter Flass <Peter@Iron-Spring.com> - 2026-09-13 20:56 -0700
                            Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2026-09-14 04:12 +0000
                          Re: history of ASCII and IBM ratfucking, and the VAX (was Re: CMS, Self-hosting and the 6502) Lynn Wheeler <lynn@garlic.com> - 2026-09-14 15:06 -1000
                  Re: CMS, Self-hosting and the 6502 antispam@fricas.org (Waldek Hebisch) - 2026-04-06 01:42 +0000
                    Re: CMS, Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-04-05 20:05 -0700
                      Re: CMS, Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-04-06 07:03 +0000
                        Re: CMS, Self-hosting and the 6502 Lynn Wheeler <lynn@garlic.com> - 2026-04-05 22:19 -1000
                          Re: CMS, Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-04-06 08:20 +0000
                          Re: CMS, Self-hosting and the 6502 cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-06 12:03 +0000
                        Re: CMS, Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-04-06 07:30 -0700
                          Re: CMS, Self-hosting and the 6502 Lynn Wheeler <lynn@garlic.com> - 2026-04-06 07:39 -1000
                            Re: CMS, Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-04-06 12:05 -0700
                              Re: CMS, Self-hosting and the 6502 Lynn Wheeler <lynn@garlic.com> - 2026-04-06 17:41 -1000
                            position-independent code (was Re: CMS, Self-hosting and the 6502) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-11 09:42 -0300
                              Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Lynn Wheeler <lynn@garlic.com> - 2026-09-12 15:12 -1000
                                Re: position-independent code (was Re: CMS, Self-hosting and the 6502) John Levine <johnl@taugh.com> - 2026-09-13 01:57 +0000
                                  Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Peter Flass <Peter@Iron-Spring.com> - 2026-09-12 21:14 -0700
                                  Re: position-independent code (was Re: CMS, Self-hosting and the 6502) legalize+jeeves@mail.xmission.com (Richard) - 2026-09-17 17:06 +0000
                                    Re: position-independent code (was Re: CMS, Self-hosting and the 6502) scott@slp53.sl.home (Scott Lurndal) - 2026-09-17 17:56 +0000
                                      Re: position-independent code (was Re: CMS, Self-hosting and the 6502) legalize+jeeves@mail.xmission.com (Richard) - 2026-09-18 14:08 +0000
                                        Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Nuno Silva <nunojsilva@invalid.invalid> - 2026-09-18 19:29 +0100
                                          Re: position-independent code (was Re: CMS, Self-hosting and the 6502) John Ames <commodorejohn@gmail.com> - 2026-09-18 12:00 -0700
                                            Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2026-09-18 20:35 +0000
                                    Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Andy Valencia <vandys@vsta.org> - 2026-09-17 11:32 -0700
                                Re: position-independent code (was Re: CMS, Self-hosting and the 6502) James Dow Allen <user4353@newsgrouper.org.invalid> - 2026-09-13 07:31 +0000
                                  Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Peter Flass <Peter@Iron-Spring.com> - 2026-09-13 07:45 -0700
                                    Re: position-independent code (was Re: CMS, Self-hosting and the 6502) John Levine <johnl@taugh.com> - 2026-09-13 16:50 +0000
                                      Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Peter Flass <Peter@Iron-Spring.com> - 2026-09-13 16:18 -0700
                                    Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-09-15 04:21 +0000
                                      Re: position-independent code (was Re: CMS, Self-hosting and the 6502) scott@slp53.sl.home (Scott Lurndal) - 2026-09-15 14:33 +0000
                                      Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Peter Flass <Peter@Iron-Spring.com> - 2026-09-15 07:37 -0700
                                        Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-09-15 23:35 +0000
                                  Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Lynn Wheeler <lynn@garlic.com> - 2026-09-14 14:41 -1000
                              Re: position-independent code (was Re: CMS, Self-hosting and the 6502) John Levine <johnl@taugh.com> - 2026-09-13 01:54 +0000
                                Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-13 14:53 -0300
                                  Re: position-independent code (was Re: CMS, Self-hosting and the 6502) John Levine <johnl@taugh.com> - 2026-09-13 22:18 +0000
                                  Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Peter Flass <Peter@Iron-Spring.com> - 2026-09-13 16:24 -0700
                                    Re: position-independent code (was Re: CMS, Self-hosting and the 6502) Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-09-14 01:51 +0000
                                  Re: position-independent code (was Re: CMS, Self-hosting and the 6502) scott@slp53.sl.home (Scott Lurndal) - 2026-09-14 14:53 +0000
                      Re: CMS, Self-hosting and the 6502 antispam@fricas.org (Waldek Hebisch) - 2026-04-06 19:21 +0000
                        Re: CMS, Self-hosting and the 6502 David Wade <g4ugm@dave.invalid> - 2026-04-06 21:25 +0100
      Re: Self-hosting and the 6502 antispam@fricas.org (Waldek Hebisch) - 2026-03-31 02:32 +0000
        Re: Self-hosting and the 6502 Bill Findlay <findlaybill@blueyonder.co.uk> - 2026-03-31 04:06 +0100
        Re: Self-hosting and the 6502 David Wade <g4ugm@dave.invalid> - 2026-03-31 08:52 +0100
          Re: Self-hosting and the 6502 Bill Findlay <findlaybill@blueyonder.co.uk> - 2026-03-31 18:07 +0100
    Re: Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-03-30 13:51 -0700
      Re: TSS arcana, Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-03-31 00:58 +0000
        Re: TSS arcana, Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-03-31 07:35 -0700
          Re: TSS arcana, Self-hosting and the 6502 Bob Eager <news0009@eager.cx> - 2026-03-31 14:54 +0000
            Re: TSS arcana, Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-03-31 13:01 -0700
        Re: TSS arcana, Self-hosting and the 6502 cross@spitfire.i.gajendra.net (Dan Cross) - 2026-03-31 22:14 +0000
          Re: TSS arcana, Self-hosting and the 6502 Bob Eager <news0009@eager.cx> - 2026-03-31 22:32 +0000
          Re: linkers, TSS arcana, Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-04-01 02:06 +0000
            Re: linkers, TSS arcana, Self-hosting and the 6502 Bob Eager <news0009@eager.cx> - 2026-04-01 09:53 +0000
              Re: linkers, TSS arcana, Self-hosting and the 6502 cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-01 16:07 +0000
                Re: linkers, TSS arcana, Self-hosting and the 6502 Bob Eager <news0009@eager.cx> - 2026-04-01 16:27 +0000
              Re: linkers, TSS arcana, Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-04-01 16:10 +0000
              Re: linkers, TSS arcana, Self-hosting and the 6502 Andy Walker <anw@cuboid.co.uk> - 2026-04-01 17:15 +0100
                Re: linkers, TSS arcana, Self-hosting and the 6502 Bob Eager <news0009@eager.cx> - 2026-04-01 16:28 +0000
                  Re: linkers, TSS arcana, Self-hosting and the 6502 scott@slp53.sl.home (Scott Lurndal) - 2026-04-01 16:48 +0000
                    Re: linkers, TSS arcana, Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-04-01 17:44 +0000
                    Re: linkers, TSS arcana, Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-04-01 14:21 -0700
                Re: linkers, TSS arcana, Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-04-01 20:40 +0000
                  Re: linkers, TSS arcana, Self-hosting and the 6502 scott@slp53.sl.home (Scott Lurndal) - 2026-04-01 22:02 +0000
                Re: linkers, TSS arcana, Self-hosting and the 6502 Andy Walker <anw@cuboid.co.uk> - 2026-04-02 15:28 +0100
                  Re: linkers, TSS arcana, Self-hosting and the 6502 scott@slp53.sl.home (Scott Lurndal) - 2026-04-02 15:36 +0000
                    Re: linkers, TSS arcana, Self-hosting and the 6502 Andy Walker <anw@cuboid.co.uk> - 2026-04-02 17:15 +0100
                    Re: linkers, TSS arcana, Self-hosting and the 6502 cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-02 16:44 +0000
    Re: Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-03-30 21:30 +0000
      Re: Self-hosting and the 6502 David Wade <g4ugm@dave.invalid> - 2026-03-30 23:28 +0100
        Re: Self-hosting and the 6502 Lawrence D’Oliveiro <ldo@nz.invalid> - 2026-03-30 23:36 +0000
          Re: Self-hosting and the 6502 John Ames <commodorejohn@gmail.com> - 2026-03-31 07:46 -0700
            Re: Self-hosting and the 6502 snipeco.2@gmail.com (Sn!pe) - 2026-03-31 15:54 +0100
            Re: Self-hosting and the 6502 Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2026-03-31 19:03 +0000
        Re: VM history, was Self-hosting and the 6502 John Levine <johnl@taugh.com> - 2026-03-31 01:04 +0000
          Re: VM history, was Self-hosting and the 6502 cross@spitfire.i.gajendra.net (Dan Cross) - 2026-03-31 22:17 +0000
      Re: Self-hosting and the 6502 Peter Flass <Peter@Iron-Spring.com> - 2026-03-30 15:36 -0700
        Re: Self-hosting and the 6502 cross@spitfire.i.gajendra.net (Dan Cross) - 2026-03-31 22:19 +0000

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#235667 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On Fri, 18 Sep 2026 19:29:38 +0100
Nuno Silva <nunojsilva@invalid.invalid> wrote:

> +1, and also I think you're putting too much faith in Google Web
> Search being able to provide relevant results. I can't see how well
> does it fare myself because Google really really wants search users
> to run Javascript.

+1 to *this.* Google has been getting steadily worse for years now, and
when they started refusing to function at all without JS that was the
last straw for me.

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#235668 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On 2026-09-18, John Ames <commodorejohn@gmail.com> wrote:

> On Fri, 18 Sep 2026 19:29:38 +0100
> Nuno Silva <nunojsilva@invalid.invalid> wrote:
>
>> +1, and also I think you're putting too much faith in Google Web
>> Search being able to provide relevant results. I can't see how well
>> does it fare myself because Google really really wants search users
>> to run Javascript.
>
> +1 to *this.* Google has been getting steadily worse for years now, and
> when they started refusing to function at all without JS that was the
> last straw for me.

Fortunately, there are other search engines.
I haven't used Google for a long time.

https://duckduckgo.com

Or,

https://noai.duckduckgo.com

if you want to avoid getting AI involved.

-- 
/~\  Charlie Gibbs                  |  In this world there are
\ /  <cgibbs@kltpzyxm.invalid>      |  two kinds of people:
 X   I'm really at ac.dekanfrus     |  1. Those who can extrapolate
/ \  if you read it the right way.  |  from incomplete data.

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#235664 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

scott@slp53.sl.home (Scott Lurndal) writes:
> Hint:  program loader

This one, presumably:

    https://linker.iecc.com/

Andy Valencia

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#235600 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

Lynn Wheeler <lynn@garlic.com> posted:
> 
> OS/360 compilers generated TXT decks that had RLD (relocation directory)
> unresolved addresses for other programs that were being loaded in one
> large group (their "ESD" entry, the ID of program being referenced and
> displacement within the program). The "loader" would resolve the "fixed"
> desired addresses (from combination of ESD and displacement) before execution.

It was half a century ago that I handled physical TXT card decks.
All my programs were standalone:  Slap a "six-card loader" at the front of
the TXT deck, and IPL.

The source code for my programs always started with
      USING *,0
Did that suppress any RLDs?  Don't remember.  The six-card loader ignored
RLDs anyway.  Actually -- never one to overlook a pointless micro-
optimization -- I "optimized" down to a three-card loader, good enough if
the TXT deck had no REP (hexadecimal patch) cards.

 - - - - - - - - - - - -

Speaking of virtual vs physical addresses, was there any IBM operating system
which could map one physical address to two different virtual addresses,
both visible from the same address space?  If so, such a program MIGHT
encounter an unusually weird bug on the 370/135.  See
      https://james.fabpedigree.com/sbe135.htm

Cheers,
James

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#235605 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On 9/13/26 00:31, James Dow Allen wrote:
> 
> Lynn Wheeler <lynn@garlic.com> posted:
>>
>> OS/360 compilers generated TXT decks that had RLD (relocation directory)
>> unresolved addresses for other programs that were being loaded in one
>> large group (their "ESD" entry, the ID of program being referenced and
>> displacement within the program). The "loader" would resolve the "fixed"
>> desired addresses (from combination of ESD and displacement) before execution.
> 
> It was half a century ago that I handled physical TXT card decks.
> All my programs were standalone:  Slap a "six-card loader" at the front of
> the TXT deck, and IPL.
> 
> The source code for my programs always started with
>        USING *,0
> Did that suppress any RLDs?  Don't remember.  The six-card loader ignored
> RLDs anyway.  Actually -- never one to overlook a pointless micro-
> optimization -- I "optimized" down to a three-card loader, good enough if
> the TXT deck had no REP (hexadecimal patch) cards.

I also wrote my own three-card loader, although I didn't have physical 
cards. I think I assembled it and stripped what I didn't need, although 
it's been quite a few years,  I believe the USING *,0 here would just be 
comments, since it was the default, and did nothing about RLDs. The RLDs 
just relocated relative to location zero, so if you loaded at zero they 
did nothing, and the absolute loader would just ignore them if present.

I keypunched Stuart Madnick's toy OS, and used the loader to boot it.

> 
>   - - - - - - - - - - - -
> 
> Speaking of virtual vs physical addresses, was there any IBM operating system
> which could map one physical address to two different virtual addresses,
> both visible from the same address space?  If so, such a program MIGHT
> encounter an unusually weird bug on the 370/135.  See
>        https://james.fabpedigree.com/sbe135.htm
> 
> Cheers,
> James

TSS, as has been mentioned (which I don't think ran, or ever was run on 
a /135). John Levine has mentioned TSS relocation briefly. Without 
analyzing it in detail I believe it was basically the same scheme as 
used for Linux PIC.

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#235607 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

According to Peter Flass  <Peter@Iron-Spring.com>:
>TSS, as has been mentioned (which I don't think ran, or ever was run on 
>a /135).

Probably not, it'd be rather underpowered and I gather the only customer
for TSS/370 was Bell Labs using it as a platform for ESS development.

> John Levine has mentioned TSS relocation briefly. Without 
>analyzing it in detail I believe it was basically the same scheme as 
>used for Linux PIC.

Sort of.  TSS didn't have anything like the GOT which has pointers to
data in othe libraries, nor the PLT which let them keep using a single
pointer to a routine.

You probably won't be surprised to hear that's in my book too.




-- 
Regards,
John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. https://jl.ly

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#235618 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On 9/13/26 09:50, John Levine wrote:
> According to Peter Flass  <Peter@Iron-Spring.com>:
>> TSS, as has been mentioned (which I don't think ran, or ever was run on
>> a /135).
> 
> Probably not, it'd be rather underpowered and I gather the only customer
> for TSS/370 was Bell Labs using it as a platform for ESS development.
> 
>> John Levine has mentioned TSS relocation briefly. Without
>> analyzing it in detail I believe it was basically the same scheme as
>> used for Linux PIC.
> 
> Sort of.  TSS didn't have anything like the GOT which has pointers to
> data in othe libraries, nor the PLT which let them keep using a single
> pointer to a routine.
> 
> You probably won't be surprised to hear that's in my book too.
> 

Probably not. I have a copy of your book sitting on a shelf in my 
office. I'm not familiar enough with anyone's PIC to comment.

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#235635 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On Sun, 13 Sep 2026 07:45:18 -0700, Peter Flass wrote:

> Without analyzing it in detail I believe it was basically the same
> scheme as used for Linux PIC.

Linux distros commonly use ELF for their userland executable/linkable
format these days. That originally came from AT&T, I believe.

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#235638 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

Lawrence =?iso-8859-13?q?D=FFOliveiro?= <ldo@nz.invalid> writes:
>On Sun, 13 Sep 2026 07:45:18 -0700, Peter Flass wrote:
>
>> Without analyzing it in detail I believe it was basically the same
>> scheme as used for Linux PIC.
>
>Linux distros commonly use ELF for their userland executable/linkable
>format these days. That originally came from AT&T, I believe.


USL[*], when SVR4 was being developed, was a distinct entity.

[*] Unix System Laboratories, partially owned by AT&T.

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#235639 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On 9/14/26 21:21, Lawrence D’Oliveiro wrote:
> On Sun, 13 Sep 2026 07:45:18 -0700, Peter Flass wrote:
> 
>> Without analyzing it in detail I believe it was basically the same
>> scheme as used for Linux PIC.
> 
> Linux distros commonly use ELF for their userland executable/linkable
> format these days. That originally came from AT&T, I believe.

That's only the wrapper. I was thinking about the underlying mechanism.

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#235648 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On Tue, 15 Sep 2026 07:37:29 -0700, Peter Flass wrote:

> On 9/14/26 21:21, Lawrence D’Oliveiro wrote:
>>
>> On Sun, 13 Sep 2026 07:45:18 -0700, Peter Flass wrote:
>>
>>> Without analyzing it in detail I believe it was basically the same
>>> scheme as used for Linux PIC.
>>
>> Linux distros commonly use ELF for their userland
>> executable/linkable format these days. That originally came from
>> AT&T, I believe.
>
> That's only the wrapper. I was thinking about the underlying
> mechanism.

ld.so?

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#235630 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

James Dow Allen <user4353@newsgrouper.org.invalid> writes:
> It was half a century ago that I handled physical TXT card decks.
> All my programs were standalone:  Slap a "six-card loader" at the front of
> the TXT deck, and IPL.
>
> The source code for my programs always started with
>       USING *,0
> Did that suppress any RLDs?  Don't remember.  The six-card loader ignored
> RLDs anyway.  Actually -- never one to overlook a pointless micro-
> optimization -- I "optimized" down to a three-card loader, good enough if
> the TXT deck had no REP (hexadecimal patch) cards.

I had taken two credit hr intro to Fortran/Computers. At the end of
semester was hired to rewrite 1401 MPIO in 360 assembler for 360/30
(64kbyte memory and 2311s). Univ was getting 360/67 for tss/360
replacing 709/1401 (709 tape->tape, 1401 unit record frontend) and got
360/30 temporarily replacing 1401 pending arrival of 360/67.

The univ. shutdown the datacenter on weekends and I would have the place
dedicated. They gave a bunch of hardware and software manuals and I got
to design and implement my own monitor, device drivers, interrupt
handlers, storage management, error recovery, etc ... and within a few
weeks I had a 2000 card assembler program. I didn't know about rep
cards, so learned to read TXT deck cards, duplicate cards, and
multi-punch hex patches.

Univ. 360/67 arrived within year of taking intro class and I was hired
fulltime responsible for OS/360 (768kbte memory and 2314s; TSS/360 not
coming to production, so ran as 360/65). 709 did student fortran in less
than second. 360/67 (as 360/65) os/360 (MFT9.5) took over a minute, I
install HASP cutting time in half. MFT11, I start redoing SYSGEN STAGE2
to carefully place datasets and PDS members to optimize arm seek and
(PDS directory) multi-track search, cutting another 2/3rds to
12.9secs. OS/360 never got better than 709 until I install Univ Waterloo
WATFOR; as 360/65, WATFOR clocked at 20,000 statements/min (333
statements/sec), student fortran tended to run 30-60 statements.

Then IBM CSC came out to install (virtual machine, precursor to vm370)
CP/67 (3rd after CSC itself and MIT Lincoln Labs) and I mostly get to
play with it during my weekend 48hr window. I then spend a few months
rewriting pathlengths for running OS/360 in virtual machine. Source was
in OS/360 files which had to be modified, assembled, mark txt deck and
merge it into a tray of txt decks (that was CP67 executable). BPS loader
IPL the tray of TXT decks which then writes core image to disk, for
ipl'ing the system.

Bare machine test ran 322secs ... initially 856secs (CP67 CPU
534secs). After a few months I had CP67 CPU down from 534secs to
113secs. I then start rewriting the dispatcher/scheduler , (dynamic
adaptive resource manager/default fair share scheduling policy), paging,
adding ordered seek queuing (from FIFO) and mutli-page transfer channel
programs (from FIFO and optimized for transfers/revolution, getting 2301
paging drum from 70-80 4k transfers/sec to channel transfer peak of
270). Six months after univ initial CP/67 install, CSC was giving one
week class in LA. I arrive on Sunday afternoon and asked to teach the
class, it turns out that the people that were going to teach it had
resigned the Friday before to join one of the 60s CSC CP67 online
commercial spin-offs (one offered Mathematica RAMIS, when RAMIS was also
offered to TYMSHARE, they did Nomad, then some former Mathematica do
FOCUS at Information Builders)

Before I graduate, I'm hired fulltime into small group in Boeing CFO
office to help with formation of Boeing Computer Services (consolidate
all dataprocessing into independent business unit). I think Renton,
largest datacenter in the world, 360/65s arriving faster than they could
be installed, boxes constantly staged in hallways around machine room
(did have lone 360/75, when doing classified work; black rope around
area, guards at corners, heavy black felt covering console lights and
visible 1403 printer areas). Lots of politics between Renton director
and CFO, who only had a 360/30 up at Boeing Field for payroll, although
they enlarge the room to install 360/67 for me to play with when I
wasn't doing other stuff. I had mid-level management badge so could park
in lots closer to the bldgs.

747-3 was flying skies of Seattle getting FAA flt certification. Tours
of mock-up of 747 cabin just south of Boeing field would claim 747s
carried so many passengers, they would never be serviced with fewer than
four jetways. Both Boeing and IBM told stories about 360 announcement
day, Boeing submitted an order making the IBM marketing rep, highest
paid IBM employee that year. Sales were still straight commission; IBM
shifts to quota the following year.

At Boeing I modified CP67 to support portions as pageable
kernel. Problem was adding more CSECTs (dividing pageable kernel into 4k
segments). Problem was I ran into BPS loader had 255 csect limit ...
and I was constantly doing hacks to keep the pageable kernel within 255
limit.

When I graduated, I joined CSC (instead of staying with Boeing CFO) and
one of my hobbies was enhanced production operating systems for internal
datacenters (one of the first was the branch office online
sales&marketing support HONE was one of the 1st & long time customers).

CSC had several card drawer cabinets up on the 9th flr attic ... and
prowling through them found source for BPS loader, and modified it to
double the maximem csects ... greatly simplifying pageable kernel
(wasn't released to customers, but picked up for VM370 follow-on).

Co-worker was responsible for CP67-based scientific centers wide-area
network. He had three "PUNCH" statements at front of the network
assembler source ... that punched hex for a 3card loader. This morphs
into the internal corporate network (larger than arpanet/internet from
the beginning until sometime mid/late 80s, about the time it was forced
to convert to SNA/VTAM).

Some of the MIT CTSS/7094 had gone to the 5th flr to do MULTICS and
others went to the scientific center on the 4th flr and done virtual
machines, networking, invented GML 1969 (morphs into SGML a decade
later, after another decade morphs into HTML at CERN), etc

Looking at what they were doing for MULTICS on the 5th flr, I created
page-mapped filesystem for CP67/CMS ... want to be able to just map
virtual memory addresses to pages on disk (w/o having to preload them
for the loader could modify the addresses) and support location
independent R/O shared (executable) files ... which I later migrate to
VM370/CMS.

For VM370R3, there is a very small subset released as DCSS, extending
shared segment to more than kernel supported with more than just the IPL
command.

-- 
virtualization experience starting Jan1968, online at home since Mar1970

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#235597 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

According to Kragen Javier Sitaker  <kragen@canonical.org>:
>I’ve never programmed the PDP-8, but, as I understand it, its 7-bit
>address field in the 12-bit instruction format effectively divides the
>4096-word address space into 128-word “pages”.  An 8th bit specifies
>which page the address field is interpreted relative to: either a
>6502-like zero page, or the current page.  So, in effect, you have two
>5-bit “base registers”: one hardwired to 00000, and the other one that’s
>the high 5 bits of the program counter.  (Later PDP-8s extended the
>address bus to the left and needed additional registers to select which
>12-bit memory space you were running in.)

Actually, the original PDP-8 had the extended addressing as an option,
adding a pair of three-bit bank registers.

>To reference words in other pages (again, as I understand it), you would
>store their absolute 12-bit address in a word in either the zero page or
>your current page, and set the indirection bit in your instructions to
>use that address as a pointer.  But often you would receive that pointer
>at run time, for example as a return address or an argument.

Yup.

>It occurred to me that a subroutine or set of related subroutines that
>fit into a single 128-word page could be “position-independent” merely
>by containing no absolute 12-bit addresses when loaded. ...

That's true, but I never heard of anyone doing that.  PDP-8 software was
pretty simple and something that swapped 128 word chunks of code could
have worked but would be way more complicated than anything I saw.  TSS/8
swapped full 4K memory banks.

-- 
Regards,
John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. https://jl.ly

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#235610 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

John Levine <johnl@taugh.com> writes:
> According to Kragen Javier Sitaker  <kragen@canonical.org>:
>>[...]  (Later PDP-8s extended the address bus to the left and needed
>>additional registers to select which 12-bit memory space you were
>>running in.)
>
> Actually, the original PDP-8 had the extended addressing as an option,
> adding a pair of three-bit bank registers.

I appreciate the correction.  So it wasn’t so much “later PDP-8s” as it
was “higher-end PDP-8s”?

>>It occurred to me that a subroutine or set of related subroutines that
>>fit into a single 128-word page could be “position-independent” merely
>>by containing no absolute 12-bit addresses when loaded. ...
>
> That's true, but I never heard of anyone doing that.  PDP-8 software was
> pretty simple and something that swapped 128 word chunks of code could
> have worked but would be way more complicated than anything I saw.  TSS/8
> swapped full 4K memory banks.

Yes, I think it would be hard to justify such a thing when you had 4096
instructions for your whole program.  I think there’s probably some
middle ground of CPU sizes, maybe something roughly Nova-sized, where
such a semi-position-independent scheme would have been a good tradeoff,
where you had room for tens or hundreds of thousands of instructions
rather than single-digit thousands like the -8.  That would have allowed
you to avoid *both* a slow load-time relocation pass *and* the adder
necessary to offset all memory accesses by a base register, like most
PDP-11s ended up having.

And, once you have room for millions of instructions, you can probably
afford the adder.

The 8086 did achieve such a sort of semi-position-independence with its
4-bit-shifted “segment” registers, which weren’t really segments in the
usual sense, like the PDP-11 had, but it had to pay for a 16-bit wide
add on every memory access to get it.  The result was that a 64-kibibyte
segment could be located anywhere in RAM, down to 16-byte granularity,
and MS-DOS took advantage of this in practice.  I suspect that a larger
shift, like 8 bits, would have been more advantageous by the mid-80s,
but you don’t avoid the adder unless you’re swapping full 64-kibibyte
memory banks, TSS/8-style.

kragen

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#235617 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

According to Kragen Javier Sitaker  <kragen@canonical.org>:
>> Actually, the original PDP-8 had the extended addressing as an option,
>> adding a pair of three-bit bank registers.
>
>I appreciate the correction.  So it wasn’t so much “later PDP-8s” as it
>was “higher-end PDP-8s”?

Right.  Later PDP-8s were not much faster than the original -8 but were
cheaper and smaller and made formerly optional stuff standard.

>The 8086 did achieve such a sort of semi-position-independence with its
>4-bit-shifted “segment” registers, which weren’t really segments in the
>usual sense, like the PDP-11 had, but it had to pay for a 16-bit wide
>add on every memory access to get it.  The result was that a 64-kibibyte
>segment could be located anywhere in RAM, down to 16-byte granularity,
>and MS-DOS took advantage of this in practice. 

Sure did.  I wasted way too much time futzing with medium model C code.

> I suspect that a larger
>shift, like 8 bits, would have been more advantageous by the mid-80s,

The 286 had real segments of up to 64K each, but changing the segment
register was so slow that we avoided doing so if at all possible.

-- 
Regards,
John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. https://jl.ly

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#235620 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On 9/13/26 10:53, Kragen Javier Sitaker wrote:
> John Levine <johnl@taugh.com> writes:
>> According to Kragen Javier Sitaker  <kragen@canonical.org>:
>>> [...]  (Later PDP-8s extended the address bus to the left and needed
>>> additional registers to select which 12-bit memory space you were
>>> running in.)
>>
>> Actually, the original PDP-8 had the extended addressing as an option,
>> adding a pair of three-bit bank registers.
> 
> I appreciate the correction.  So it wasn’t so much “later PDP-8s” as it
> was “higher-end PDP-8s”?

Was there actually such a thing?

> 
>>> It occurred to me that a subroutine or set of related subroutines that
>>> fit into a single 128-word page could be “position-independent” merely
>>> by containing no absolute 12-bit addresses when loaded. ...
>>
>> That's true, but I never heard of anyone doing that.  PDP-8 software was
>> pretty simple and something that swapped 128 word chunks of code could
>> have worked but would be way more complicated than anything I saw.  TSS/8
>> swapped full 4K memory banks.
> 
> Yes, I think it would be hard to justify such a thing when you had 4096
> instructions for your whole program.  I think there’s probably some
> middle ground of CPU sizes, maybe something roughly Nova-sized, where
> such a semi-position-independent scheme would have been a good tradeoff,
> where you had room for tens or hundreds of thousands of instructions
> rather than single-digit thousands like the -8.  That would have allowed
> you to avoid *both* a slow load-time relocation pass *and* the adder
> necessary to offset all memory accesses by a base register, like most
> PDP-11s ended up having.
> 
> And, once you have room for millions of instructions, you can probably
> afford the adder.
> 
> The 8086 did achieve such a sort of semi-position-independence with its
> 4-bit-shifted “segment” registers, which weren’t really segments in the
> usual sense, like the PDP-11 had, but it had to pay for a 16-bit wide
> add on every memory access to get it.  The result was that a 64-kibibyte
> segment could be located anywhere in RAM, down to 16-byte granularity,
> and MS-DOS took advantage of this in practice.  I suspect that a larger
> shift, like 8 bits, would have been more advantageous by the mid-80s,
> but you don’t avoid the adder unless you’re swapping full 64-kibibyte
> memory banks, TSS/8-style.
> 

808x segments were the worst of all possible worlds. I still can't wrap 
my head around the fact that there were multiple ways of encoding the 
same address.

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#235623 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

On Sun, 13 Sep 2026 16:24:37 -0700, Peter Flass wrote:

> 808x segments were the worst of all possible worlds. I still can't
> wrap my head around the fact that there were multiple ways of
> encoding the same address.

I can think of something worse: Z8000 segmentation. An address
consisted of 32 bits, but the only significant bits were the bottom 16
plus some more in another part near the top.

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#235626 — Re: position-independent code (was Re: CMS, Self-hosting and the 6502)

Kragen Javier Sitaker <kragen@canonical.org> writes:
>John Levine <johnl@taugh.com> writes:
>> According to Kragen Javier Sitaker  <kragen@canonical.org>:
>>>[...]  (Later PDP-8s extended the address bus to the left and needed
>>>additional registers to select which 12-bit memory space you were
>>>running in.)
>>
>> Actually, the original PDP-8 had the extended addressing as an option,
>> adding a pair of three-bit bank registers.
>
>I appreciate the correction.  So it wasn’t so much “later PDP-8s” as it
>was “higher-end PDP-8s”?
>
>>>It occurred to me that a subroutine or set of related subroutines that
>>>fit into a single 128-word page could be “position-independent” merely
>>>by containing no absolute 12-bit addresses when loaded. ...
>>
>> That's true, but I never heard of anyone doing that.  PDP-8 software was
>> pretty simple and something that swapped 128 word chunks of code could
>> have worked but would be way more complicated than anything I saw.  TSS/8
>> swapped full 4K memory banks.
>
>Yes, I think it would be hard to justify such a thing when you had 4096
>instructions for your whole program.

A program had 4096 memory locations - a significant fraction of that
was data, not instructions.

Running under TSS8, a program was limited to a single 4k field.  Under
OS/8, the application was allowed use multiple 4k fields (up to 7,
IIRC).

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#234634 — Re: CMS, Self-hosting and the 6502

Peter Flass <Peter@iron-spring.com> wrote:
> On 4/5/26 18:42, Waldek Hebisch wrote:
>> John Levine <johnl@taugh.com> wrote:
>>> According to David Wade  <g4ugm@dave.invalid>:
>>>> On 05/04/2026 00:44, Lawrence D’Oliveiro wrote:
>>>>> I wonder how many people at DEC worked on TOPS-10 ... remember, they
>>>>> were able to provide true multiuser support from the get-go, which CMS
>>>>> could not.
>>>>
>>>> No but CMS is still in use today, and it still doesn't provide true
>>>> multi user support whatever that is
>>>
>>> No matter what it is, it would make no sense since it only runs under VM which provides
>>> quite a lot of multi-user support.
>>>
>>> I would also note that any VM system that can run CMS can also run several flavors of linux,
>>> all at the same time, if that's what you want.
>> 
>> VM6 runs in 370 mode and runs CMS.  IIUC Linux needs at least s390 mode
>> so can not run under VM6.
>> 
> 
> One of the colleges, probably Marist, had an unofficial version of Linux 
> running on a 370. I understand GCC wanted a PC-relative branch 
> instruction, so they had to code around that.

AFAICS there is more to this.  There was a version of GCC targeting
370, so in a sense that was handled.  But IIUC GCC for 370 emited
assembler that Paul Edwards used, which was similar or maybe
identical to assembler for some version of MVS.  However, for
me neither MVS assembler (that is version that I had) nor
binutils were able to handle assembler output from GCC.

Beside GCC, AFAICS there is substantial difference in s390 and
370 system instructions and data structures.  So one would have
to rework low level machine specific support.

-- 
                              Waldek Hebisch

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#234635 — Re: CMS, Self-hosting and the 6502

On 06/04/2026 20:21, Waldek Hebisch wrote:
> Peter Flass <Peter@iron-spring.com> wrote:
>> On 4/5/26 18:42, Waldek Hebisch wrote:
>>> John Levine <johnl@taugh.com> wrote:
>>>> According to David Wade  <g4ugm@dave.invalid>:
>>>>> On 05/04/2026 00:44, Lawrence D’Oliveiro wrote:
>>>>>> I wonder how many people at DEC worked on TOPS-10 ... remember, they
>>>>>> were able to provide true multiuser support from the get-go, which CMS
>>>>>> could not.
>>>>>
>>>>> No but CMS is still in use today, and it still doesn't provide true
>>>>> multi user support whatever that is
>>>>
>>>> No matter what it is, it would make no sense since it only runs under VM which provides
>>>> quite a lot of multi-user support.
>>>>
>>>> I would also note that any VM system that can run CMS can also run several flavors of linux,
>>>> all at the same time, if that's what you want.
>>>
>>> VM6 runs in 370 mode and runs CMS.  IIUC Linux needs at least s390 mode
>>> so can not run under VM6.
>>>
>>
>> One of the colleges, probably Marist, had an unofficial version of Linux
>> running on a 370. I understand GCC wanted a PC-relative branch
>> instruction, so they had to code around that.
> 
> AFAICS there is more to this.  There was a version of GCC targeting
> 370, so in a sense that was handled.  But IIUC GCC for 370 emited
> assembler that Paul Edwards used, which was similar or maybe
> identical to assembler for some version of MVS.  However, for
> me neither MVS assembler (that is version that I had) nor
> binutils were able to handle assembler output from GCC.
> 
> Beside GCC, AFAICS there is substantial difference in s390 and
> 370 system instructions and data structures.  So one would have
> to rework low level machine specific support.
> 
I think this is probably referring to the BIGFOOT port which I think 
initially ran on what was called S370/XA but this is a 31-bit hardware 
so close the ESA

Dave

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