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| From | Hul Tytus <ht@panix.com> |
|---|---|
| Newsgroups | sci.electronics.design |
| Subject | Atmel 328 ext. interupts |
| Date | 2018-04-23 20:31 +0000 |
| Organization | PANIX Public Access Internet and UNIX, NYC |
| Message-ID | <pblfrk$pse$1@reader1.panix.com> (permalink) |
sci.electronics.design Atmel 328 external interupts I'm debugging an Atmel AVR 328 that won't generate an external #0 interupt. At present, the timer1 is generating an overflow interupt as would be expected. The input for the #0 ext. interupt (pin 4, d port #2) has been set to generate a mimic signal on another pin, which worked well. The setup for interupt 0 is: ldi areg, 2 ; external interupt #0 occurrs on fallling edge sts EICRA, areg ldi areg, 1 ; enable interupt #0 sts EIMSK, areg The possibly of a "power management" bit needing attention exists or maybe a variation between the 328 and the 168 device that I've missed. Anyone have a suggestion? Hul
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Atmel 328 ext. interupts Hul Tytus <ht@panix.com> - 2018-04-23 20:31 +0000
Re: Atmel 328 ext. interupts DemonicTubes <tlackie@gmail.com> - 2018-04-23 13:51 -0700
Re: Atmel 328 ext. interupts Hul Tytus <ht@panix.com> - 2018-04-23 21:08 +0000
Re: Atmel 328 ext. interupts DemonicTubes <tlackie@gmail.com> - 2018-04-23 14:18 -0700
Re: Atmel 328 ext. interupts bitrex <user@example.net> - 2018-04-23 17:30 -0400
Re: Atmel 328 ext. interupts bitrex <user@example.net> - 2018-04-23 17:59 -0400
Re: Atmel 328 ext. interupts mpm <mpmillard@aol.com> - 2018-04-23 20:00 -0700
Re: Atmel 328 ext. interupts Johann Klammer <klammerj@NOSPAM.a1.net> - 2018-04-24 11:35 +0200
Re: Atmel 328 ext. interupts Hul Tytus <ht@panix.com> - 2018-04-24 15:29 +0000
Re: Atmel 328 ext. interupts Hul Tytus <ht@panix.com> - 2018-04-24 15:58 +0000
Re: Atmel 328 ext. interupts Johann Klammer <klammerj@NOSPAM.a1.net> - 2018-04-25 11:45 +0200
Re: Atmel 328 ext. interupts Hul Tytus <ht@panix.com> - 2018-04-25 12:30 +0000
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