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| Newsgroups | comp.sys.apple2 |
|---|---|
| Date | 2022-08-19 07:48 -0700 |
| References | (6 earlier) <acfff3cc-a190-4963-b71a-0bdedbfd9344@googlegroups.com> <b0fe3919-dfe5-4246-8227-cda61df60f3bn@googlegroups.com> <1158733182.682552542.444243.alawther-spammenot.mac.com@nntp.aioe.org> <c8a490f4-94d2-4f3e-bf0b-937c11a034adn@googlegroups.com> <1735967565.682584156.053463.alawther-spammenot.mac.com@nntp.aioe.org> |
| Message-ID | <6d32f8c2-9de2-49f2-86c9-96e76d2ff491n@googlegroups.com> (permalink) |
| Subject | Re: WDC 65C832 design in today's world |
| From | Anthony Ortiz <anthonypaulo@gmail.com> |
> The 65C832 as proposed is basically a 32 bit version of the 65C816. In > order to implement it you’ll need to make some decisions that WDC never got > around to: > * opcode and byte count for XFE to switch between bit modes; > * how to handle XBA in 32 bit mode (swap the top and bottom 16 bit groups, > or bytes 1 and 0 like in 16 bit mode) > * whether to clear or preserve the top 16 bits of the A, X, and Y > registers when switching between 32 bit and 16 bit modes; > * register transfer ops in 32 bit mode (TDC, TSC, TXA, TYA clear top 16 > bits of C?); and > * probably other things I haven’t thought of. > > > In choosing to emulate a 65C832 you limit yourself to > * 8 bit data bus (4 memory cycles to load a 32 bit register) > * 24 bit program address space (16Mb limit) > * 24 bit data address space (unless you pretend it is an ASIC version with > 32 bit data address space) > > You’ll also need to develop a new software development tool chain for this > ‘preliminary’ processor. > > By comparison, if you chose an ARM coprocessor you’d have the 32 bit > address space and tool chain ready to go. This is what I don't understand... I'm talking about a spiritual successor to the 65C816 that looks like a duck, walks like a duck, and quacks like a duck... unlike what the 65C832 would be to the 65C816 as that is to the 65C02 as that is to the 6502, the ARM has no resemblance whatsoever to the 6502 line despite it having been the inspiration for the ARM; you might as well put an Intel inside and program a new GS/OS in x86 and run it and claim it's an Apple IIgs, but it's not, you can't leverage any existing software, not even a single instruction, so it doesn't make any sense in an Apple II. With the 65C832 you'd be able to leverage what's already out there, and any assemblers and compilers would simply need to be extended, not replaced. What I'm saying is that I think we're at the point where we can create a much faster Apple II accelerator (via FPGA or emulation as I'm doing on my Pi) so we can achieve that 1ghz GS/OS , and while we're at it maybe we can add some things that we've always wanted in the process, like 32-bitness or some badly-needed instructions. Also I'm not stuck on the 65C832, right now this is all just talk, just trying to see what the veterans here think the successor should look like if one had been made for the 32-bit world, just a bunch of locker-room talk for now. I'll be happy just to get this 1ghz 6502 going, lol!
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Re: WDC 65C832 design in today's world Anthony Ortiz <anthonypaulo@gmail.com> - 2022-08-18 09:03 -0700
Re: WDC 65C832 design in today's world Anthony Lawther <alawther@spammenot.mac.com> - 2022-08-19 07:21 +0900
Re: WDC 65C832 design in today's world Anthony Ortiz <anthonypaulo@gmail.com> - 2022-08-18 16:10 -0700
Re: WDC 65C832 design in today's world Anthony Lawther <alawther@spammenot.mac.com> - 2022-08-19 16:26 +0900
Re: WDC 65C832 design in today's world Anthony Ortiz <anthonypaulo@gmail.com> - 2022-08-19 07:48 -0700
Re: WDC 65C832 design in today's world kegs@provalid.com (Kent Dickey) - 2022-08-20 21:14 +0000
Re: WDC 65C832 design in today's world Jeff Blakeney <CUTjeffrey_blakeney@yahoo.ca> - 2022-08-21 09:35 -0400
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