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Re: How does IIgs register $C035 bit 6 affect $e000+?

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On Tuesday, 20 October 2020 at 15:27:25 UTC-4, Kent Dickey wrote:
> When $C035 bit 6 is 0, memory from $c000-$ffff in banks 0 and 1 work like 
> an Apple //e, with all the language card, ROM, and IO space soft switches 
> (built-in and peripherals) behaving as you would expect on a //e affecting 
> accessing to banks 0 and 1. 
> 
> When $C035 bit 6 is 1, memory from $c000-$ffff in bank 0 is the DRAM from 
> $c000-$ffff--there is no LC bank switching, no ROM, and no IO space soft 
> switches. And similarly in bank 1 (but it points to bank 1 DRAM). 
> 
> During normal IIgs operation (running any regular OS, such as GSOS/ProDOS 16, 
> or ProDOS 8), $C035 bit 6 will always be 0. Only specialized demos seem 
> to mess with $C035 bit 6. You can assume that unless you're the one 
> setting it, $C035 bit 6 will be 0. 
> 
> This setting ($C035 bit 6 set to 1) is the only way to get non-ROM vectors 
> for breaks/IRQs. The IIgs will always use ROM (regardless of LC setting) 
> to get the $FFFE or $FFE6/$FFEE vector, unless this is set. This differs 
> from a //e or other II where the active LC RAM at $FFxx will be used if the 
> LC is active. 
> 
> Standard Apple //e memory mapping is complex, and I think that is your 
> actual question. What is it you're trying to do? 

Just research; writing emulators is one of my hobbies and reading up as though I were going to write one even more so. But this feels like a day one-type question — the documentation didn't feel particularly explicit as to how the reset vector ends up being sourced from ROM and therefore how the system even starts up.

As well as the Hardware Reference and the Firmware Guide, I also checked the Fischer book; I'm grateful for your answer indicating that bit 6 does affect the entire range from $c000 to the end of each bank, which both explains how appropriate vectors are visible straight from the power-on reset and how they can point to useful code. 

I think I'm actually fine with //e mapping; I wrote https://github.com/TomHarte/CLK/wiki/Apple-IIe-Memory-Paging to summarise it for myself back when I wrote an emulator of that. I hope it's accurate (and, indeed, comprehensible). So if I've fully understood then I guess the main difference on a IIgs with bit 6 = 0 versus a IIe is that VPB also factors in? I can't imagine that they changed the rules for regular memory accesses.

I'm also taking it from the documentation and your commentary that with bit 6 = 0, banks $00 and $01 have exactly the same contents. Presumably that's a safeguard against those addressing modes, like abs, x, that can now cross bank boundaries?

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How does IIgs register $C035 bit 6 affect $e000+? Thomas Harte <thomas.harte@gmail.com> - 2020-10-20 10:08 -0700
  Re: How does IIgs register $C035 bit 6 affect $e000+? kegs@provalid.com (Kent Dickey) - 2020-10-20 14:27 -0500
    Re: How does IIgs register $C035 bit 6 affect $e000+? Thomas Harte <thomas.harte@gmail.com> - 2020-10-20 12:59 -0700
      Re: How does IIgs register $C035 bit 6 affect $e000+? kegs@provalid.com (Kent Dickey) - 2020-10-21 14:52 -0500
        Re: How does IIgs register $C035 bit 6 affect $e000+? Thomas Harte <thomas.harte@gmail.com> - 2020-10-22 12:01 -0700
      Re: How does IIgs register $C035 bit 6 affect $e000+? Thomas Harte <thomas.harte@gmail.com> - 2020-10-21 13:06 -0700

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