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Re: Recompiling the Carte Blanche II project 1 with Xilinx ISE

Newsgroups comp.sys.apple2
Date 2015-11-28 08:50 -0800
References <mokebh$ug8$1@dont-email.me>
Message-ID <20c501bb-ec8a-403a-8609-c679248a9902@googlegroups.com> (permalink)
Subject Re: Recompiling the Carte Blanche II project 1 with Xilinx ISE
From a2retro <a2retrosystems@gmail.com>

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On Monday, July 20, 2015 at 11:31:26 PM UTC-4, Charlie wrote:
> Project1 is a video demo of vertical color bars, bright on top fading to 
> dark at the bottom.  The right hand bar cycles through the colors.
> The original project was compiled with Altium designer.
> Here is how I recompiled the Carte Blanche II project 1 with Xilinx ISE 
> ver 14.7.
> 
> 1.  I created a new folder named ISEProject1.
> 
> 2.  I copied all the files with extensions .v and .ucf from the root 
> directory of the original project folder to the new ISEProject1 folder.
> 
> 3.  Opening the folder 'ProjectOutputs' (in the original folder) and 
> then the folder 'CB2' I then copied the files with extensions .v and 
> .vhd and .edn to my new folder.
> 
> 3.  I ran ISE and clicked 'New Project...' and in the resulting wizard I 
> gave it the same name as the folder 'ISEProject1' and set the Location 
> and Working Directory to my ISEProject1 folder.  Also, set the 
> 'Top-level source type' to HDL.
> 
> 4. Clicked 'Next' and made sure that the project settings matched the 
> FPGA chip.
> Family:  Spartan3A and Spartan3AN
> Device:  XC3S400AN
> Package: FGG400
> Speed:   -4
> 
> 5. Clicked 'Next' and then 'Finish'.  ISE should create the blank project.
> 
> 6. In the ISE 'Project' menu click 'Add Source...' which opens up a 
> window to your ISEProject folder.  Select all the files that were copied 
> from the original folder and click the 'Open' button.
> 
> 7. The files should show up green in the next dialog window.  The one 
> .edn file was yellow. Click open and ISE should build a tree structure 
> of the files in the 'Hierarchy' frame.
> 
> 8. Clicked on 'Generate Programming File' and got lots of errors. 
> Looking at the list of errors they were all about unconnected pins.
> (Look in the Design Summary - Project Status Window, click on the Errors 
> to see the list.)
> 
> I opened the .ucf file for editing in ISE by selecting 'CBII.ucf' in the 
> 'Hierarchy' pane and then clicked on 'Edit Constraints (Text)' in the 
> 'Processes:' pane.
> 
> 9. I 'commented out' (put a leading # sign) on all the lines that start 
> with 'NET' that were mentioned in the error messages.  Then saved the file.
> 
> 10. Clicked 'Generate Programming File' again and this time it compiled.
> 
> 11. I ran the resulting bitstream and it looked the same as the one from 
> the AppleLogic site.
> 
> Here's a link to the project:
> 
> http://noboot.com/charlie/ISEProject1.zip
> 
> Charlie

Just a note that you can set the project to ignore unused constraints if you don't want to comment out all the unused pins. This worked for me except with ABUS_DMAIN as it was listed as pull_up.

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Re: Recompiling the Carte Blanche II project 1 with Xilinx ISE a2retro <a2retrosystems@gmail.com> - 2015-11-28 08:50 -0800
  Re: Recompiling the Carte Blanche II project 1 with Xilinx ISE "Bill Garber" <willy46pa@comcast.net> - 2015-11-28 14:58 -0500
    Re: Recompiling the Carte Blanche II project 1 with Xilinx ISE a2retro <a2retrosystems@gmail.com> - 2015-11-28 12:16 -0800
  Re: Recompiling the Carte Blanche II project 1 with Xilinx ISE Charlie <charlieDOTd@verEYEzon.net> - 2015-11-28 19:41 -0500

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