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Groups > comp.os.msdos.programmer > #442
| From | "Rod Pemberton" <do_not_have@nospicedham.noavailemail.cmm> |
|---|---|
| Subject | Re: Persistent memory during reset |
| Message-ID | <jb6n6o$i65$1@speranza.aioe.org> (permalink) |
| Date | 2011-11-30 21:03 -0500 |
| Organization | Aioe.org NNTP Server |
| References | <de96da1c-b329-4bab-9761-0e8bf36f0686@h3g2000yqa.googlegroups.com> |
| Newsgroups | comp.lang.asm.x86, alt.os.development, comp.os.msdos.programmer |
Cross-posted to 3 groups.
"Adrian Smith" <adrian.maxwell.smith@nospicedham.googlemail.com> wrote in message news:de96da1c-b329-4bab-9761-0e8bf36f0686@h3g2000yqa.googlegroups.com... > > Is there any standard region of BIOS or x86 platform memory > that persists after a system reset. > In general, not that I'm aware of. It would "open the door" to persistent malware. You may be able to use CMOS. IIRC, the early PCs had fewer CMOS registers, like 64, but modern PCs have more, like 128. So, I think a bunch of them may be free or useable, i.e., > 64. RBIL's CMOS.LST file gives background information on which values are standardized. Basically, CMOS registers below 64, except a few are standardized. So, there are a few below 64, and possibly 64 above 64. You probably won't know if a register is in use by your BIOS unless you change it and cause a problem ... Personally, instead of looking for a free register, I would read CMOS.LST looking for a register that's already in-use or defined, but one that can be changed and has little or no impact on the system. If you do a 286 style PM reset with correct settings, all memory used prior to the reset should be intact. However, the BIOS reset code for a warm or cold boot won't be executed. You'll want to read up on the shutdown code for CMOS register 0Fh. Value of zero is a normal reset. Values of 5 or 0Ah, upon reset, the BIOS code will jump to the RM address in 40:67h. I'm not sure if 40:72h reset flag needs to be zero (cold boot) or 1234h (warm boot) or if it doesn't matter. There are other values for CMOS 0Fh and 40:72 that I've not mentioned. RBIL covers this in a very generic way in MEMORY.LST sections M00400067, M00400072 and in CMOS.LST section R0F. Otherwise, there are just a hanful of posts to Usenet on the topic over the decades, so you may need a good book on programming for more info. Rod Pemberton
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Re: Persistent memory during reset "Rod Pemberton" <do_not_have@nospicedham.noavailemail.cmm> - 2011-11-30 21:03 -0500
Re: Persistent memory during reset "wolfgang kern" <nowhere@never.at> - 2011-12-03 00:07 +0100
Re: Persistent memory during reset Ruud Baltissen <rbaltissen@nospicedham.gmail.com> - 2011-12-29 09:44 -0800
Re: Persistent memory during reset Robert Wessel <robertwessel2@nospicedham.yahoo.com> - 2011-12-30 01:34 -0600
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