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Reading and writing into fpga using PCIe driver.

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Hi,

I'm new to PCI-e drivers working on Xilinx ML605 Virtex-6 FPGA board. The PCIe End Point (32-bit) of the FPGA has been enabled: Bar0, 1 MB. I want to accomplish a simple read/ write operation to the BAR0 location (note: I'm not using DMA). I have registered as a char device and can read all configuration space registers. I'm following the Xilinx XAPP1022 Memory endpoint test given by Xilinx.

Please could you suggest a way to read and write into memory location with offset say 0x04 from BAR 0 base location. I used ioremap and wrote into gBaseVirt (virtual address) using memcpy (to write into bar0 base address). My read and write functions in driver part are as follows:

Write module:

ssize_t XPCIe_Write(struct file *filp, const char *buf, size_t count,
loff_t *f_pos)
{
memcpy((char *)gBaseVirt, buf, count);
printk(KERN_INFO "\n\n***write module***\n");
printk("%s: XPCIe_Write: %d bytes have been written...@ address 0x%x ",
gDrvrName, count, gBaseVirt);
return (0);
}


Read module:

ssize_t XPCIe_Read(struct file *filp, char *buf, size_t count, loff_t
*f_pos)
{
memcpy(buf, (char *)gBaseVirt, count);
printk(KERN_INFO "\n***Read module***");
printk(KERN_INFO "%s: XPCIe_Read:  %d bytes have been read... from
address 0x%x\n", gDrvrName, count, gBaseVirt);
return (0);
}


gBaseVirt is a pointer to kernel address after mapping bar0.

Please advice if this is correct. If not, please suggest another way to do so.

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Thread

Reading and writing into fpga using PCIe driver. sangeeta.m89@gmail.com - 2012-11-21 05:41 -0800
  Re: Reading and writing into fpga using PCIe driver. Tim Roberts <timr@probo.com> - 2012-11-21 20:27 -0800

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