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Make file question about the .c.o rule

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From	General Schvantzkoph <schvantzkoph@yahoo.com>
Newsgroups	comp.os.linux.development.apps
Subject	Make file question about the .c.o rule
Date	24 Jul 2011 18:05:54 GMT
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How do I use the .c.o rule when the sources are in subdirectories,

for example

foo/src2.c

bar/src2.c

In my Makefile I have 

.c.o: $(HDL_COMMON_INCLUDES) ${HDL_INCLUDES} $(PMACS_INCLUDES)
	$(CC) $(CFLAGS) -c $< 

This compiles the sources and puts the .o files in the top directory 
rather that the subdirectory. The problem is that Make doesn't realize 
that the .o files exist so every invocation of make builds everything.

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Make file question about the .c.o rule General Schvantzkoph <schvantzkoph@yahoo.com> - 2011-07-24 18:05 +0000
  Re: Make file question about the .c.o rule Måns Rullgård <mans@mansr.com> - 2011-07-24 19:12 +0100
    Re: Make file question about the .c.o rule General Schvantzkoph <schvantzkoph@yahoo.com> - 2011-07-24 18:23 +0000

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