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Re: Forth Implemented on a MISC Processor

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rickman <gnuarm@gmail.com> writes:
> I'm still considering the implications of that, but I'm sure it will
> end up with multiple clocks per instruction, just not a variable
> number.  Likely three or four clocks defining "phases" of the
> instruction.  It will be a bit more complex in some ways than the pure
> stack design, but should be faster and may be smaller.

Have you read Koopman's stuff about stack hardware, and looked at
Bernd's b16 design?

I thought one of the defining characteristics of MISC was that by giving
up any access to the interior of the stack, you can do most operations
in a single cycle with no pipelining.  You sometimes use extra
instructions juggling the stack, but you make up for that in higher ipc,
higher clock frequencies, and less chip area (so more parallelism
through multiple cores, if your problem can use that).  

Looking at the F18A die photo though, it appears dominated by memory
arrays: stacks, ram, and rom.  The ALU is a tiny sliver in the middle.
Therefore I get the idea that by going to 6 bit instruction and possibly
doubling the ALU's size, the cpu could have been much more powerful at
relatively little cost in silicon.  I wonder if experienced GA144
programmers ever get over the pain of seeing 4-7 instruction slots
burned every time they use the constant "1".  But, supposedly Chuck and
company did a fair amount of simulation of various options before going
forward with what they have, so maybe they know something I don't.

> The part I am ill-equipped to handle is writing a Forth compiler to
> generate good code for this design.  Manually coding using the
> primitive instructions would not be so hard, but designing a Forth
> optimizing compiler might be a stretch, certainly for me.

I'd expect the user program to map just about directly to machine
instructions, similar to Chuck's chips.  Arrayforth seems like
more of an assembler than a compiler.

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Thread

Forth Implemented on a MISC Processor rickman <gnuarm@gmail.com> - 2013-04-18 18:24 -0400
  Re: Forth Implemented on a MISC Processor Brad Eckert <hwfwguy@gmail.com> - 2013-04-19 12:28 -0700
    Re: Forth Implemented on a MISC Processor rickman <gnuarm@gmail.com> - 2013-04-19 15:55 -0400
      Re: Forth Implemented on a MISC Processor Brad Eckert <hwfwguy@gmail.com> - 2013-04-22 09:18 -0700
        Re: Forth Implemented on a MISC Processor rickman <gnuarm@gmail.com> - 2013-04-22 16:05 -0400
          Re: Forth Implemented on a MISC Processor Brad Eckert <hwfwguy@gmail.com> - 2013-04-22 14:08 -0700
            Re: Forth Implemented on a MISC Processor rickman <gnuarm@gmail.com> - 2013-04-22 17:52 -0400
  Re: Forth Implemented on a MISC Processor Jecel <jecel@merlintec.com> - 2013-04-19 15:24 -0700
    Re: Forth Implemented on a MISC Processor rickman <gnuarm@gmail.com> - 2013-04-20 01:02 -0400
  Re: Forth Implemented on a MISC Processor Paul Rubin <no.email@nospam.invalid> - 2013-04-19 21:37 -0700
    Re: Forth Implemented on a MISC Processor rickman <gnuarm@gmail.com> - 2013-04-20 16:20 -0400
      Re: Forth Implemented on a MISC Processor Paul Rubin <no.email@nospam.invalid> - 2013-04-20 14:21 -0700
        Re: Forth Implemented on a MISC Processor rickman <gnuarm@gmail.com> - 2013-04-20 18:03 -0400
          Re: Forth Implemented on a MISC Processor Paul Rubin <no.email@nospam.invalid> - 2013-04-21 17:07 -0700
            Re: Forth Implemented on a MISC Processor Brad Eckert <hwfwguy@gmail.com> - 2013-04-22 12:05 -0700
            Re: Forth Implemented on a MISC Processor rickman <gnuarm@gmail.com> - 2013-04-22 16:19 -0400

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